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test-disasm-arm.cc
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28 
29 #include <stdlib.h>
30 
31 #include "v8.h"
32 
33 #include "debug.h"
34 #include "disasm.h"
35 #include "disassembler.h"
36 #include "macro-assembler.h"
37 #include "serialize.h"
38 #include "cctest.h"
39 
40 using namespace v8::internal;
41 
42 
43 bool DisassembleAndCompare(byte* pc, const char* compare_string) {
44  disasm::NameConverter converter;
45  disasm::Disassembler disasm(converter);
46  EmbeddedVector<char, 128> disasm_buffer;
47 
48  disasm.InstructionDecode(disasm_buffer, pc);
49 
50  if (strcmp(compare_string, disasm_buffer.start()) != 0) {
51  fprintf(stderr,
52  "expected: \n"
53  "%s\n"
54  "disassembled: \n"
55  "%s\n\n",
56  compare_string, disasm_buffer.start());
57  return false;
58  }
59  return true;
60 }
61 
62 
63 // Set up V8 to a state where we can at least run the assembler and
64 // disassembler. Declare the variables and allocate the data structures used
65 // in the rest of the macros.
66 #define SET_UP() \
67  CcTest::InitializeVM(); \
68  Isolate* isolate = CcTest::i_isolate(); \
69  HandleScope scope(isolate); \
70  byte *buffer = reinterpret_cast<byte*>(malloc(4*1024)); \
71  Assembler assm(isolate, buffer, 4*1024); \
72  bool failure = false;
73 
74 
75 // This macro assembles one instruction using the preallocated assembler and
76 // disassembles the generated instruction, comparing the output to the expected
77 // value. If the comparison fails an error message is printed, but the test
78 // continues to run until the end.
79 #define COMPARE(asm_, compare_string) \
80  { \
81  int pc_offset = assm.pc_offset(); \
82  byte *progcounter = &buffer[pc_offset]; \
83  assm.asm_; \
84  if (!DisassembleAndCompare(progcounter, compare_string)) failure = true; \
85  }
86 
87 // Force emission of any pending literals into a pool.
88 #define EMIT_PENDING_LITERALS() \
89  assm.CheckConstPool(true, false)
90 
91 
92 // Verify that all invocations of the COMPARE macro passed successfully.
93 // Exit with a failure if at least one of the tests failed.
94 #define VERIFY_RUN() \
95 if (failure) { \
96  V8_Fatal(__FILE__, __LINE__, "ARM Disassembler tests failed.\n"); \
97  }
98 
99 
100 TEST(Type0) {
101  SET_UP();
102 
103  COMPARE(and_(r0, r1, Operand(r2)),
104  "e0010002 and r0, r1, r2");
105  COMPARE(and_(r1, r2, Operand(r3), LeaveCC),
106  "e0021003 and r1, r2, r3");
107  COMPARE(and_(r2, r3, Operand(r4), SetCC),
108  "e0132004 ands r2, r3, r4");
109  COMPARE(and_(r3, r4, Operand(r5), LeaveCC, eq),
110  "00043005 andeq r3, r4, r5");
111 
112  COMPARE(eor(r4, r5, Operand(r6, LSL, 0)),
113  "e0254006 eor r4, r5, r6");
114  COMPARE(eor(r4, r5, Operand(r7, LSL, 1), SetCC),
115  "e0354087 eors r4, r5, r7, lsl #1");
116  COMPARE(eor(r4, r5, Operand(r8, LSL, 2), LeaveCC, ne),
117  "10254108 eorne r4, r5, r8, lsl #2");
118  COMPARE(eor(r4, r5, Operand(r9, LSL, 3), SetCC, cs),
119  "20354189 eorcss r4, r5, r9, lsl #3");
120 
121  COMPARE(sub(r5, r6, Operand(r10, LSL, 31), LeaveCC, hs),
122  "20465f8a subcs r5, r6, r10, lsl #31");
123  COMPARE(sub(r5, r6, Operand(r10, LSL, 30), SetCC, cc),
124  "30565f0a subccs r5, r6, r10, lsl #30");
125  COMPARE(sub(r5, r6, Operand(r10, LSL, 24), LeaveCC, lo),
126  "30465c0a subcc r5, r6, r10, lsl #24");
127  COMPARE(sub(r5, r6, Operand(r10, LSL, 16), SetCC, mi),
128  "4056580a submis r5, r6, r10, lsl #16");
129 
130  COMPARE(rsb(r6, r7, Operand(fp)),
131  "e067600b rsb r6, r7, fp");
132  COMPARE(rsb(r6, r7, Operand(fp, LSR, 1)),
133  "e06760ab rsb r6, r7, fp, lsr #1");
134  COMPARE(rsb(r6, r7, Operand(fp, LSR, 0), SetCC),
135  "e077602b rsbs r6, r7, fp, lsr #32");
136  COMPARE(rsb(r6, r7, Operand(fp, LSR, 31), LeaveCC, pl),
137  "50676fab rsbpl r6, r7, fp, lsr #31");
138 
139  COMPARE(add(r7, r8, Operand(ip, ASR, 1)),
140  "e08870cc add r7, r8, ip, asr #1");
141  COMPARE(add(r7, r8, Operand(ip, ASR, 0)),
142  "e088704c add r7, r8, ip, asr #32");
143  COMPARE(add(r7, r8, Operand(ip), SetCC),
144  "e098700c adds r7, r8, ip");
145  COMPARE(add(r7, r8, Operand(ip, ASR, 31), SetCC, vs),
146  "60987fcc addvss r7, r8, ip, asr #31");
147 
148  COMPARE(adc(r7, fp, Operand(ip, ASR, 5)),
149  "e0ab72cc adc r7, fp, ip, asr #5");
150  COMPARE(adc(r4, ip, Operand(ip, ASR, 1), LeaveCC, vc),
151  "70ac40cc adcvc r4, ip, ip, asr #1");
152  COMPARE(adc(r5, sp, Operand(ip), SetCC),
153  "e0bd500c adcs r5, sp, ip");
154  COMPARE(adc(r8, lr, Operand(ip, ASR, 31), SetCC, vc),
155  "70be8fcc adcvcs r8, lr, ip, asr #31");
156 
157  COMPARE(sbc(r7, r1, Operand(ip, ROR, 1), LeaveCC, hi),
158  "80c170ec sbchi r7, r1, ip, ror #1");
159  COMPARE(sbc(r7, r9, Operand(ip, ROR, 4)),
160  "e0c9726c sbc r7, r9, ip, ror #4");
161  COMPARE(sbc(r7, r10, Operand(ip), SetCC),
162  "e0da700c sbcs r7, r10, ip");
163  COMPARE(sbc(r7, ip, Operand(ip, ROR, 31), SetCC, hi),
164  "80dc7fec sbchis r7, ip, ip, ror #31");
165 
166  COMPARE(rsc(r7, r8, Operand(ip, LSL, r0)),
167  "e0e8701c rsc r7, r8, ip, lsl r0");
168  COMPARE(rsc(r7, r8, Operand(ip, LSL, r1)),
169  "e0e8711c rsc r7, r8, ip, lsl r1");
170  COMPARE(rsc(r7, r8, Operand(ip), SetCC),
171  "e0f8700c rscs r7, r8, ip");
172  COMPARE(rsc(r7, r8, Operand(ip, LSL, r3), SetCC, ls),
173  "90f8731c rsclss r7, r8, ip, lsl r3");
174 
175  COMPARE(tst(r7, Operand(r5, ASR, ip), ge),
176  "a1170c55 tstge r7, r5, asr ip");
177  COMPARE(tst(r7, Operand(r6, ASR, sp)),
178  "e1170d56 tst r7, r6, asr sp");
179  COMPARE(tst(r7, Operand(r7), ge),
180  "a1170007 tstge r7, r7");
181  COMPARE(tst(r7, Operand(r8, ASR, fp), ge),
182  "a1170b58 tstge r7, r8, asr fp");
183 
184  COMPARE(teq(r7, Operand(r5, ROR, r0), lt),
185  "b1370075 teqlt r7, r5, ror r0");
186  COMPARE(teq(r7, Operand(r6, ROR, lr)),
187  "e1370e76 teq r7, r6, ror lr");
188  COMPARE(teq(r7, Operand(r7), lt),
189  "b1370007 teqlt r7, r7");
190  COMPARE(teq(r7, Operand(r8, ROR, r1)),
191  "e1370178 teq r7, r8, ror r1");
192 
193  COMPARE(cmp(r7, Operand(r4)),
194  "e1570004 cmp r7, r4");
195  COMPARE(cmp(r7, Operand(r6, LSL, 1), gt),
196  "c1570086 cmpgt r7, r6, lsl #1");
197  COMPARE(cmp(r7, Operand(r8, LSR, 3), gt),
198  "c15701a8 cmpgt r7, r8, lsr #3");
199  COMPARE(cmp(r7, Operand(r8, ASR, 19)),
200  "e15709c8 cmp r7, r8, asr #19");
201 
202  COMPARE(cmn(r0, Operand(r4)),
203  "e1700004 cmn r0, r4");
204  COMPARE(cmn(r1, Operand(r6, ROR, 1)),
205  "e17100e6 cmn r1, r6, ror #1");
206  COMPARE(cmn(r2, Operand(r8)),
207  "e1720008 cmn r2, r8");
208  COMPARE(cmn(r3, Operand(fp), le),
209  "d173000b cmnle r3, fp");
210 
211  COMPARE(orr(r7, r8, Operand(lr), LeaveCC, al),
212  "e188700e orr r7, r8, lr");
213  COMPARE(orr(r7, r8, Operand(fp)),
214  "e188700b orr r7, r8, fp");
215  COMPARE(orr(r7, r8, Operand(sp), SetCC),
216  "e198700d orrs r7, r8, sp");
217  COMPARE(orr(r7, r8, Operand(ip), SetCC, al),
218  "e198700c orrs r7, r8, ip");
219 
220  COMPARE(mov(r0, Operand(r1), LeaveCC, eq),
221  "01a00001 moveq r0, r1");
222  COMPARE(mov(r0, Operand(r2)),
223  "e1a00002 mov r0, r2");
224  COMPARE(mov(r0, Operand(r3), SetCC),
225  "e1b00003 movs r0, r3");
226  COMPARE(mov(r0, Operand(r4), SetCC, pl),
227  "51b00004 movpls r0, r4");
228 
229  COMPARE(bic(r0, lr, Operand(r1), LeaveCC, vs),
230  "61ce0001 bicvs r0, lr, r1");
231  COMPARE(bic(r0, r9, Operand(r2), LeaveCC, vc),
232  "71c90002 bicvc r0, r9, r2");
233  COMPARE(bic(r0, r5, Operand(r3), SetCC),
234  "e1d50003 bics r0, r5, r3");
235  COMPARE(bic(r0, r1, Operand(r4), SetCC, pl),
236  "51d10004 bicpls r0, r1, r4");
237 
238  COMPARE(mvn(r10, Operand(r1)),
239  "e1e0a001 mvn r10, r1");
240  COMPARE(mvn(r9, Operand(r2)),
241  "e1e09002 mvn r9, r2");
242  COMPARE(mvn(r0, Operand(r3), SetCC),
243  "e1f00003 mvns r0, r3");
244  COMPARE(mvn(r5, Operand(r4), SetCC, cc),
245  "31f05004 mvnccs r5, r4");
246 
247  // Instructions autotransformed by the assembler.
248  // mov -> mvn.
249  COMPARE(mov(r3, Operand(-1), LeaveCC, al),
250  "e3e03000 mvn r3, #0");
251  COMPARE(mov(r4, Operand(-2), SetCC, al),
252  "e3f04001 mvns r4, #1");
253  COMPARE(mov(r5, Operand(0x0ffffff0), SetCC, ne),
254  "13f052ff mvnnes r5, #-268435441");
255  COMPARE(mov(r6, Operand(-1), LeaveCC, ne),
256  "13e06000 mvnne r6, #0");
257 
258  // mvn -> mov.
259  COMPARE(mvn(r3, Operand(-1), LeaveCC, al),
260  "e3a03000 mov r3, #0");
261  COMPARE(mvn(r4, Operand(-2), SetCC, al),
262  "e3b04001 movs r4, #1");
263  COMPARE(mvn(r5, Operand(0x0ffffff0), SetCC, ne),
264  "13b052ff movnes r5, #-268435441");
265  COMPARE(mvn(r6, Operand(-1), LeaveCC, ne),
266  "13a06000 movne r6, #0");
267 
268  // mov -> movw.
269  if (CpuFeatures::IsSupported(ARMv7)) {
270  COMPARE(mov(r5, Operand(0x01234), LeaveCC, ne),
271  "13015234 movwne r5, #4660");
272  // We only disassemble one instruction so the eor instruction is not here.
273  COMPARE(eor(r5, r4, Operand(0x1234), LeaveCC, ne),
274  "1301c234 movwne ip, #4660");
275  // Movw can't do setcc, so first move to ip, then the following instruction
276  // moves to r5. Mov immediate with setcc is pretty strange anyway.
277  COMPARE(mov(r5, Operand(0x01234), SetCC, ne),
278  "1301c234 movwne ip, #4660");
279  // Emit a literal pool now, otherwise this could be dumped later, in the
280  // middle of a different test.
281  EMIT_PENDING_LITERALS();
282 
283  // We only disassemble one instruction so the eor instruction is not here.
284  // The eor does the setcc so we get a movw here.
285  COMPARE(eor(r5, r4, Operand(0x1234), SetCC, ne),
286  "1301c234 movwne ip, #4660");
287 
288  COMPARE(movt(r5, 0x4321, ne),
289  "13445321 movtne r5, #17185");
290  COMPARE(movw(r5, 0xabcd, eq),
291  "030a5bcd movweq r5, #43981");
292  }
293 
294  // Eor doesn't have an eor-negative variant, but we can do an mvn followed by
295  // an eor to get the same effect.
296  COMPARE(eor(r5, r4, Operand(0xffffff34), SetCC, ne),
297  "13e0c0cb mvnne ip, #203");
298 
299  // and <-> bic.
300  COMPARE(and_(r3, r5, Operand(0xfc03ffff)),
301  "e3c537ff bic r3, r5, #66846720");
302  COMPARE(bic(r3, r5, Operand(0xfc03ffff)),
303  "e20537ff and r3, r5, #66846720");
304 
305  // sub <-> add.
306  COMPARE(add(r3, r5, Operand(-1024)),
307  "e2453b01 sub r3, r5, #1024");
308  COMPARE(sub(r3, r5, Operand(-1024)),
309  "e2853b01 add r3, r5, #1024");
310 
311  // cmp <-> cmn.
312  COMPARE(cmp(r3, Operand(-1024)),
313  "e3730b01 cmn r3, #1024");
314  COMPARE(cmn(r3, Operand(-1024)),
315  "e3530b01 cmp r3, #1024");
316 
317  // Miscellaneous instructions encoded as type 0.
318  COMPARE(blx(ip),
319  "e12fff3c blx ip");
320  COMPARE(bkpt(0),
321  "e1200070 bkpt 0");
322  COMPARE(bkpt(0xffff),
323  "e12fff7f bkpt 65535");
324  COMPARE(clz(r6, r7),
325  "e16f6f17 clz r6, r7");
326 
327  VERIFY_RUN();
328 }
329 
330 
331 TEST(Type1) {
332  SET_UP();
333 
334  COMPARE(and_(r0, r1, Operand(0x00000000)),
335  "e2010000 and r0, r1, #0");
336  COMPARE(and_(r1, r2, Operand(0x00000001), LeaveCC),
337  "e2021001 and r1, r2, #1");
338  COMPARE(and_(r2, r3, Operand(0x00000010), SetCC),
339  "e2132010 ands r2, r3, #16");
340  COMPARE(and_(r3, r4, Operand(0x00000100), LeaveCC, eq),
341  "02043c01 andeq r3, r4, #256");
342  COMPARE(and_(r4, r5, Operand(0x00001000), SetCC, ne),
343  "12154a01 andnes r4, r5, #4096");
344 
345  COMPARE(eor(r4, r5, Operand(0x00001000)),
346  "e2254a01 eor r4, r5, #4096");
347  COMPARE(eor(r4, r4, Operand(0x00010000), LeaveCC),
348  "e2244801 eor r4, r4, #65536");
349  COMPARE(eor(r4, r3, Operand(0x00100000), SetCC),
350  "e2334601 eors r4, r3, #1048576");
351  COMPARE(eor(r4, r2, Operand(0x01000000), LeaveCC, cs),
352  "22224401 eorcs r4, r2, #16777216");
353  COMPARE(eor(r4, r1, Operand(0x10000000), SetCC, cc),
354  "32314201 eorccs r4, r1, #268435456");
355 
356  VERIFY_RUN();
357 }
358 
359 
360 TEST(Type3) {
361  SET_UP();
362 
363  if (CpuFeatures::IsSupported(ARMv7)) {
364  COMPARE(ubfx(r0, r1, 5, 10),
365  "e7e902d1 ubfx r0, r1, #5, #10");
366  COMPARE(ubfx(r1, r0, 5, 10),
367  "e7e912d0 ubfx r1, r0, #5, #10");
368  COMPARE(ubfx(r0, r1, 31, 1),
369  "e7e00fd1 ubfx r0, r1, #31, #1");
370  COMPARE(ubfx(r1, r0, 31, 1),
371  "e7e01fd0 ubfx r1, r0, #31, #1");
372 
373  COMPARE(sbfx(r0, r1, 5, 10),
374  "e7a902d1 sbfx r0, r1, #5, #10");
375  COMPARE(sbfx(r1, r0, 5, 10),
376  "e7a912d0 sbfx r1, r0, #5, #10");
377  COMPARE(sbfx(r0, r1, 31, 1),
378  "e7a00fd1 sbfx r0, r1, #31, #1");
379  COMPARE(sbfx(r1, r0, 31, 1),
380  "e7a01fd0 sbfx r1, r0, #31, #1");
381 
382  COMPARE(bfc(r0, 5, 10),
383  "e7ce029f bfc r0, #5, #10");
384  COMPARE(bfc(r1, 5, 10),
385  "e7ce129f bfc r1, #5, #10");
386  COMPARE(bfc(r0, 31, 1),
387  "e7df0f9f bfc r0, #31, #1");
388  COMPARE(bfc(r1, 31, 1),
389  "e7df1f9f bfc r1, #31, #1");
390 
391  COMPARE(bfi(r0, r1, 5, 10),
392  "e7ce0291 bfi r0, r1, #5, #10");
393  COMPARE(bfi(r1, r0, 5, 10),
394  "e7ce1290 bfi r1, r0, #5, #10");
395  COMPARE(bfi(r0, r1, 31, 1),
396  "e7df0f91 bfi r0, r1, #31, #1");
397  COMPARE(bfi(r1, r0, 31, 1),
398  "e7df1f90 bfi r1, r0, #31, #1");
399 
400  COMPARE(usat(r0, 1, Operand(r1)),
401  "e6e10011 usat r0, #1, r1");
402  COMPARE(usat(r2, 7, Operand(lr)),
403  "e6e7201e usat r2, #7, lr");
404  COMPARE(usat(r3, 31, Operand(r4, LSL, 31)),
405  "e6ff3f94 usat r3, #31, r4, lsl #31");
406  COMPARE(usat(r8, 0, Operand(r5, ASR, 17)),
407  "e6e088d5 usat r8, #0, r5, asr #17");
408 
409  COMPARE(pkhbt(r3, r4, Operand(r5, LSL, 17)),
410  "e6843895 pkhbt r3, r4, r5, lsl #17");
411  COMPARE(pkhtb(r3, r4, Operand(r5, ASR, 17)),
412  "e68438d5 pkhtb r3, r4, r5, asr #17");
413  COMPARE(uxtb(r9, Operand(r10, ROR, 0)),
414  "e6ef907a uxtb r9, r10");
415  COMPARE(uxtb(r3, Operand(r4, ROR, 8)),
416  "e6ef3474 uxtb r3, r4, ror #8");
417  COMPARE(uxtab(r3, r4, Operand(r5, ROR, 8)),
418  "e6e43475 uxtab r3, r4, r5, ror #8");
419  COMPARE(uxtb16(r3, Operand(r4, ROR, 8)),
420  "e6cf3474 uxtb16 r3, r4, ror #8");
421  }
422 
423  VERIFY_RUN();
424 }
425 
426 
427 
428 TEST(Vfp) {
429  SET_UP();
430 
431  if (CpuFeatures::IsSupported(VFP3)) {
432  CpuFeatureScope scope(&assm, VFP3);
433  COMPARE(vmov(d0, r2, r3),
434  "ec432b10 vmov d0, r2, r3");
435  COMPARE(vmov(r2, r3, d0),
436  "ec532b10 vmov r2, r3, d0");
437  COMPARE(vmov(d0, d1),
438  "eeb00b41 vmov.f64 d0, d1");
439  COMPARE(vmov(d3, d3, eq),
440  "0eb03b43 vmoveq.f64 d3, d3");
441 
442  COMPARE(vmov(s0, s31),
443  "eeb00a6f vmov.f32 s0, s31");
444  COMPARE(vmov(s31, s0),
445  "eef0fa40 vmov.f32 s31, s0");
446  COMPARE(vmov(r0, s0),
447  "ee100a10 vmov r0, s0");
448  COMPARE(vmov(r10, s31),
449  "ee1faa90 vmov r10, s31");
450  COMPARE(vmov(s0, r0),
451  "ee000a10 vmov s0, r0");
452  COMPARE(vmov(s31, r10),
453  "ee0faa90 vmov s31, r10");
454 
455  COMPARE(vabs(d0, d1),
456  "eeb00bc1 vabs.f64 d0, d1");
457  COMPARE(vabs(d3, d4, mi),
458  "4eb03bc4 vabsmi.f64 d3, d4");
459 
460  COMPARE(vneg(d0, d1),
461  "eeb10b41 vneg.f64 d0, d1");
462  COMPARE(vneg(d3, d4, mi),
463  "4eb13b44 vnegmi.f64 d3, d4");
464 
465  COMPARE(vadd(d0, d1, d2),
466  "ee310b02 vadd.f64 d0, d1, d2");
467  COMPARE(vadd(d3, d4, d5, mi),
468  "4e343b05 vaddmi.f64 d3, d4, d5");
469 
470  COMPARE(vsub(d0, d1, d2),
471  "ee310b42 vsub.f64 d0, d1, d2");
472  COMPARE(vsub(d3, d4, d5, ne),
473  "1e343b45 vsubne.f64 d3, d4, d5");
474 
475  COMPARE(vmul(d2, d1, d0),
476  "ee212b00 vmul.f64 d2, d1, d0");
477  COMPARE(vmul(d6, d4, d5, cc),
478  "3e246b05 vmulcc.f64 d6, d4, d5");
479 
480  COMPARE(vdiv(d2, d2, d2),
481  "ee822b02 vdiv.f64 d2, d2, d2");
482  COMPARE(vdiv(d6, d7, d7, hi),
483  "8e876b07 vdivhi.f64 d6, d7, d7");
484 
485  COMPARE(vcmp(d0, d1),
486  "eeb40b41 vcmp.f64 d0, d1");
487  COMPARE(vcmp(d0, 0.0),
488  "eeb50b40 vcmp.f64 d0, #0.0");
489 
490  COMPARE(vsqrt(d0, d0),
491  "eeb10bc0 vsqrt.f64 d0, d0");
492  COMPARE(vsqrt(d2, d3, ne),
493  "1eb12bc3 vsqrtne.f64 d2, d3");
494 
495  COMPARE(vmov(d0, 1.0),
496  "eeb70b00 vmov.f64 d0, #1");
497  COMPARE(vmov(d2, -13.0),
498  "eeba2b0a vmov.f64 d2, #-13");
499 
500  COMPARE(vmov(d0, VmovIndexLo, r0),
501  "ee000b10 vmov.32 d0[0], r0");
502  COMPARE(vmov(d0, VmovIndexHi, r0),
503  "ee200b10 vmov.32 d0[1], r0");
504 
505  COMPARE(vmov(r2, VmovIndexLo, d15),
506  "ee1f2b10 vmov.32 r2, d15[0]");
507  COMPARE(vmov(r3, VmovIndexHi, d14),
508  "ee3e3b10 vmov.32 r3, d14[1]");
509 
510  COMPARE(vldr(s0, r0, 0),
511  "ed900a00 vldr s0, [r0 + 4*0]");
512  COMPARE(vldr(s1, r1, 4),
513  "edd10a01 vldr s1, [r1 + 4*1]");
514  COMPARE(vldr(s15, r4, 16),
515  "edd47a04 vldr s15, [r4 + 4*4]");
516  COMPARE(vldr(s16, r5, 20),
517  "ed958a05 vldr s16, [r5 + 4*5]");
518  COMPARE(vldr(s31, r10, 1020),
519  "eddafaff vldr s31, [r10 + 4*255]");
520 
521  COMPARE(vstr(s0, r0, 0),
522  "ed800a00 vstr s0, [r0 + 4*0]");
523  COMPARE(vstr(s1, r1, 4),
524  "edc10a01 vstr s1, [r1 + 4*1]");
525  COMPARE(vstr(s15, r8, 8),
526  "edc87a02 vstr s15, [r8 + 4*2]");
527  COMPARE(vstr(s16, r9, 12),
528  "ed898a03 vstr s16, [r9 + 4*3]");
529  COMPARE(vstr(s31, r10, 1020),
530  "edcafaff vstr s31, [r10 + 4*255]");
531 
532  COMPARE(vldr(d0, r0, 0),
533  "ed900b00 vldr d0, [r0 + 4*0]");
534  COMPARE(vldr(d1, r1, 4),
535  "ed911b01 vldr d1, [r1 + 4*1]");
536  COMPARE(vldr(d15, r10, 1020),
537  "ed9afbff vldr d15, [r10 + 4*255]");
538  COMPARE(vstr(d0, r0, 0),
539  "ed800b00 vstr d0, [r0 + 4*0]");
540  COMPARE(vstr(d1, r1, 4),
541  "ed811b01 vstr d1, [r1 + 4*1]");
542  COMPARE(vstr(d15, r10, 1020),
543  "ed8afbff vstr d15, [r10 + 4*255]");
544 
545  COMPARE(vmsr(r5),
546  "eee15a10 vmsr FPSCR, r5");
547  COMPARE(vmsr(r10, pl),
548  "5ee1aa10 vmsrpl FPSCR, r10");
549  COMPARE(vmsr(pc),
550  "eee1fa10 vmsr FPSCR, APSR");
551  COMPARE(vmrs(r5),
552  "eef15a10 vmrs r5, FPSCR");
553  COMPARE(vmrs(r10, ge),
554  "aef1aa10 vmrsge r10, FPSCR");
555  COMPARE(vmrs(pc),
556  "eef1fa10 vmrs APSR, FPSCR");
557 
558  COMPARE(vstm(ia, r0, d1, d3),
559  "ec801b06 vstmia r0, {d1-d3}");
560  COMPARE(vldm(ia, r1, d2, d5),
561  "ec912b08 vldmia r1, {d2-d5}");
562  COMPARE(vstm(ia, r2, d0, d15),
563  "ec820b20 vstmia r2, {d0-d15}");
564  COMPARE(vldm(ia, r3, d0, d15),
565  "ec930b20 vldmia r3, {d0-d15}");
566  COMPARE(vstm(ia, r4, s1, s3),
567  "ecc40a03 vstmia r4, {s1-s3}");
568  COMPARE(vldm(ia, r5, s2, s5),
569  "ec951a04 vldmia r5, {s2-s5}");
570  COMPARE(vstm(ia, r6, s0, s31),
571  "ec860a20 vstmia r6, {s0-s31}");
572  COMPARE(vldm(ia, r7, s0, s31),
573  "ec970a20 vldmia r7, {s0-s31}");
574 
575  COMPARE(vmla(d2, d1, d0),
576  "ee012b00 vmla.f64 d2, d1, d0");
577  COMPARE(vmla(d6, d4, d5, cc),
578  "3e046b05 vmlacc.f64 d6, d4, d5");
579 
580  COMPARE(vmls(d2, d1, d0),
581  "ee012b40 vmls.f64 d2, d1, d0");
582  COMPARE(vmls(d6, d4, d5, cc),
583  "3e046b45 vmlscc.f64 d6, d4, d5");
584 
585  COMPARE(vcvt_u32_f64(s0, d0),
586  "eebc0bc0 vcvt.u32.f64 s0, d0");
587  COMPARE(vcvt_s32_f64(s0, d0),
588  "eebd0bc0 vcvt.s32.f64 s0, d0");
589  COMPARE(vcvt_f64_u32(d0, s1),
590  "eeb80b60 vcvt.f64.u32 d0, s1");
591  COMPARE(vcvt_f64_s32(d0, s1),
592  "eeb80be0 vcvt.f64.s32 d0, s1");
593  COMPARE(vcvt_f32_s32(s0, s2),
594  "eeb80ac1 vcvt.f32.s32 s0, s2");
595  COMPARE(vcvt_f64_s32(d0, 1),
596  "eeba0bef vcvt.f64.s32 d0, d0, #1");
597 
598  if (CpuFeatures::IsSupported(VFP32DREGS)) {
599  COMPARE(vmov(d3, d27),
600  "eeb03b6b vmov.f64 d3, d27");
601  COMPARE(vmov(d18, d7),
602  "eef02b47 vmov.f64 d18, d7");
603  COMPARE(vmov(d18, r2, r3),
604  "ec432b32 vmov d18, r2, r3");
605  COMPARE(vmov(r2, r3, d18),
606  "ec532b32 vmov r2, r3, d18");
607  COMPARE(vmov(d20, d31),
608  "eef04b6f vmov.f64 d20, d31");
609 
610  COMPARE(vabs(d16, d31),
611  "eef00bef vabs.f64 d16, d31");
612 
613  COMPARE(vneg(d16, d31),
614  "eef10b6f vneg.f64 d16, d31");
615 
616  COMPARE(vadd(d16, d17, d18),
617  "ee710ba2 vadd.f64 d16, d17, d18");
618 
619  COMPARE(vsub(d16, d17, d18),
620  "ee710be2 vsub.f64 d16, d17, d18");
621 
622  COMPARE(vmul(d16, d17, d18),
623  "ee610ba2 vmul.f64 d16, d17, d18");
624 
625  COMPARE(vdiv(d16, d17, d18),
626  "eec10ba2 vdiv.f64 d16, d17, d18");
627 
628  COMPARE(vcmp(d16, d17),
629  "eef40b61 vcmp.f64 d16, d17");
630  COMPARE(vcmp(d16, 0.0),
631  "eef50b40 vcmp.f64 d16, #0.0");
632 
633  COMPARE(vsqrt(d16, d17),
634  "eef10be1 vsqrt.f64 d16, d17");
635 
636  COMPARE(vmov(d30, 16.0),
637  "eef3eb00 vmov.f64 d30, #16");
638 
639  COMPARE(vmov(d31, VmovIndexLo, r7),
640  "ee0f7b90 vmov.32 d31[0], r7");
641  COMPARE(vmov(d31, VmovIndexHi, r7),
642  "ee2f7b90 vmov.32 d31[1], r7");
643 
644  COMPARE(vldr(d25, r0, 0),
645  "edd09b00 vldr d25, [r0 + 4*0]");
646  COMPARE(vldr(d26, r1, 4),
647  "edd1ab01 vldr d26, [r1 + 4*1]");
648  COMPARE(vldr(d31, r10, 1020),
649  "eddafbff vldr d31, [r10 + 4*255]");
650 
651  COMPARE(vstr(d16, r0, 0),
652  "edc00b00 vstr d16, [r0 + 4*0]");
653  COMPARE(vstr(d17, r1, 4),
654  "edc11b01 vstr d17, [r1 + 4*1]");
655  COMPARE(vstr(d31, r10, 1020),
656  "edcafbff vstr d31, [r10 + 4*255]");
657 
658  COMPARE(vstm(ia, r0, d16, d31),
659  "ecc00b20 vstmia r0, {d16-d31}");
660  COMPARE(vldm(ia, r3, d16, d31),
661  "ecd30b20 vldmia r3, {d16-d31}");
662  COMPARE(vstm(ia, r0, d23, d27),
663  "ecc07b0a vstmia r0, {d23-d27}");
664  COMPARE(vldm(ia, r3, d23, d27),
665  "ecd37b0a vldmia r3, {d23-d27}");
666 
667  COMPARE(vmla(d16, d17, d18),
668  "ee410ba2 vmla.f64 d16, d17, d18");
669 
670  COMPARE(vcvt_u32_f64(s0, d16),
671  "eebc0be0 vcvt.u32.f64 s0, d16");
672  COMPARE(vcvt_s32_f64(s0, d16),
673  "eebd0be0 vcvt.s32.f64 s0, d16");
674  COMPARE(vcvt_f64_u32(d16, s1),
675  "eef80b60 vcvt.f64.u32 d16, s1");
676  }
677  }
678 
679  VERIFY_RUN();
680 }
681 
682 
683 TEST(Neon) {
684  SET_UP();
685 
686  if (CpuFeatures::IsSupported(NEON)) {
687  CpuFeatureScope scope(&assm, NEON);
688  COMPARE(vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(r1)),
689  "f421420f vld1.8 {d4, d5, d6, d7}, [r1]");
690  COMPARE(vst1(Neon16, NeonListOperand(d17, 4), NeonMemOperand(r9)),
691  "f449124f vst1.16 {d17, d18, d19, d20}, [r9]");
692  COMPARE(vmovl(NeonU8, q3, d1),
693  "f3886a11 vmovl.u8 q3, d1");
694  COMPARE(vmovl(NeonU8, q4, d2),
695  "f3888a12 vmovl.u8 q4, d2");
696  }
697 
698  VERIFY_RUN();
699 }
700 
701 
702 TEST(LoadStore) {
703  SET_UP();
704 
705  COMPARE(ldrb(r0, MemOperand(r1)),
706  "e5d10000 ldrb r0, [r1, #+0]");
707  COMPARE(ldrb(r2, MemOperand(r3, 42)),
708  "e5d3202a ldrb r2, [r3, #+42]");
709  COMPARE(ldrb(r4, MemOperand(r5, -42)),
710  "e555402a ldrb r4, [r5, #-42]");
711  COMPARE(ldrb(r6, MemOperand(r7, 42, PostIndex)),
712  "e4d7602a ldrb r6, [r7], #+42");
713  COMPARE(ldrb(r8, MemOperand(r9, -42, PostIndex)),
714  "e459802a ldrb r8, [r9], #-42");
715  COMPARE(ldrb(r10, MemOperand(fp, 42, PreIndex)),
716  "e5fba02a ldrb r10, [fp, #+42]!");
717  COMPARE(ldrb(ip, MemOperand(sp, -42, PreIndex)),
718  "e57dc02a ldrb ip, [sp, #-42]!");
719  COMPARE(ldrb(r0, MemOperand(r1, r2)),
720  "e7d10002 ldrb r0, [r1, +r2]");
721  COMPARE(ldrb(r0, MemOperand(r1, r2, NegOffset)),
722  "e7510002 ldrb r0, [r1, -r2]");
723  COMPARE(ldrb(r0, MemOperand(r1, r2, PostIndex)),
724  "e6d10002 ldrb r0, [r1], +r2");
725  COMPARE(ldrb(r0, MemOperand(r1, r2, NegPostIndex)),
726  "e6510002 ldrb r0, [r1], -r2");
727  COMPARE(ldrb(r0, MemOperand(r1, r2, PreIndex)),
728  "e7f10002 ldrb r0, [r1, +r2]!");
729  COMPARE(ldrb(r0, MemOperand(r1, r2, NegPreIndex)),
730  "e7710002 ldrb r0, [r1, -r2]!");
731 
732  COMPARE(strb(r0, MemOperand(r1)),
733  "e5c10000 strb r0, [r1, #+0]");
734  COMPARE(strb(r2, MemOperand(r3, 42)),
735  "e5c3202a strb r2, [r3, #+42]");
736  COMPARE(strb(r4, MemOperand(r5, -42)),
737  "e545402a strb r4, [r5, #-42]");
738  COMPARE(strb(r6, MemOperand(r7, 42, PostIndex)),
739  "e4c7602a strb r6, [r7], #+42");
740  COMPARE(strb(r8, MemOperand(r9, -42, PostIndex)),
741  "e449802a strb r8, [r9], #-42");
742  COMPARE(strb(r10, MemOperand(fp, 42, PreIndex)),
743  "e5eba02a strb r10, [fp, #+42]!");
744  COMPARE(strb(ip, MemOperand(sp, -42, PreIndex)),
745  "e56dc02a strb ip, [sp, #-42]!");
746  COMPARE(strb(r0, MemOperand(r1, r2)),
747  "e7c10002 strb r0, [r1, +r2]");
748  COMPARE(strb(r0, MemOperand(r1, r2, NegOffset)),
749  "e7410002 strb r0, [r1, -r2]");
750  COMPARE(strb(r0, MemOperand(r1, r2, PostIndex)),
751  "e6c10002 strb r0, [r1], +r2");
752  COMPARE(strb(r0, MemOperand(r1, r2, NegPostIndex)),
753  "e6410002 strb r0, [r1], -r2");
754  COMPARE(strb(r0, MemOperand(r1, r2, PreIndex)),
755  "e7e10002 strb r0, [r1, +r2]!");
756  COMPARE(strb(r0, MemOperand(r1, r2, NegPreIndex)),
757  "e7610002 strb r0, [r1, -r2]!");
758 
759  COMPARE(ldrh(r0, MemOperand(r1)),
760  "e1d100b0 ldrh r0, [r1, #+0]");
761  COMPARE(ldrh(r2, MemOperand(r3, 42)),
762  "e1d322ba ldrh r2, [r3, #+42]");
763  COMPARE(ldrh(r4, MemOperand(r5, -42)),
764  "e15542ba ldrh r4, [r5, #-42]");
765  COMPARE(ldrh(r6, MemOperand(r7, 42, PostIndex)),
766  "e0d762ba ldrh r6, [r7], #+42");
767  COMPARE(ldrh(r8, MemOperand(r9, -42, PostIndex)),
768  "e05982ba ldrh r8, [r9], #-42");
769  COMPARE(ldrh(r10, MemOperand(fp, 42, PreIndex)),
770  "e1fba2ba ldrh r10, [fp, #+42]!");
771  COMPARE(ldrh(ip, MemOperand(sp, -42, PreIndex)),
772  "e17dc2ba ldrh ip, [sp, #-42]!");
773  COMPARE(ldrh(r0, MemOperand(r1, r2)),
774  "e19100b2 ldrh r0, [r1, +r2]");
775  COMPARE(ldrh(r0, MemOperand(r1, r2, NegOffset)),
776  "e11100b2 ldrh r0, [r1, -r2]");
777  COMPARE(ldrh(r0, MemOperand(r1, r2, PostIndex)),
778  "e09100b2 ldrh r0, [r1], +r2");
779  COMPARE(ldrh(r0, MemOperand(r1, r2, NegPostIndex)),
780  "e01100b2 ldrh r0, [r1], -r2");
781  COMPARE(ldrh(r0, MemOperand(r1, r2, PreIndex)),
782  "e1b100b2 ldrh r0, [r1, +r2]!");
783  COMPARE(ldrh(r0, MemOperand(r1, r2, NegPreIndex)),
784  "e13100b2 ldrh r0, [r1, -r2]!");
785 
786  COMPARE(strh(r0, MemOperand(r1)),
787  "e1c100b0 strh r0, [r1, #+0]");
788  COMPARE(strh(r2, MemOperand(r3, 42)),
789  "e1c322ba strh r2, [r3, #+42]");
790  COMPARE(strh(r4, MemOperand(r5, -42)),
791  "e14542ba strh r4, [r5, #-42]");
792  COMPARE(strh(r6, MemOperand(r7, 42, PostIndex)),
793  "e0c762ba strh r6, [r7], #+42");
794  COMPARE(strh(r8, MemOperand(r9, -42, PostIndex)),
795  "e04982ba strh r8, [r9], #-42");
796  COMPARE(strh(r10, MemOperand(fp, 42, PreIndex)),
797  "e1eba2ba strh r10, [fp, #+42]!");
798  COMPARE(strh(ip, MemOperand(sp, -42, PreIndex)),
799  "e16dc2ba strh ip, [sp, #-42]!");
800  COMPARE(strh(r0, MemOperand(r1, r2)),
801  "e18100b2 strh r0, [r1, +r2]");
802  COMPARE(strh(r0, MemOperand(r1, r2, NegOffset)),
803  "e10100b2 strh r0, [r1, -r2]");
804  COMPARE(strh(r0, MemOperand(r1, r2, PostIndex)),
805  "e08100b2 strh r0, [r1], +r2");
806  COMPARE(strh(r0, MemOperand(r1, r2, NegPostIndex)),
807  "e00100b2 strh r0, [r1], -r2");
808  COMPARE(strh(r0, MemOperand(r1, r2, PreIndex)),
809  "e1a100b2 strh r0, [r1, +r2]!");
810  COMPARE(strh(r0, MemOperand(r1, r2, NegPreIndex)),
811  "e12100b2 strh r0, [r1, -r2]!");
812 
813  COMPARE(ldr(r0, MemOperand(r1)),
814  "e5910000 ldr r0, [r1, #+0]");
815  COMPARE(ldr(r2, MemOperand(r3, 42)),
816  "e593202a ldr r2, [r3, #+42]");
817  COMPARE(ldr(r4, MemOperand(r5, -42)),
818  "e515402a ldr r4, [r5, #-42]");
819  COMPARE(ldr(r6, MemOperand(r7, 42, PostIndex)),
820  "e497602a ldr r6, [r7], #+42");
821  COMPARE(ldr(r8, MemOperand(r9, -42, PostIndex)),
822  "e419802a ldr r8, [r9], #-42");
823  COMPARE(ldr(r10, MemOperand(fp, 42, PreIndex)),
824  "e5bba02a ldr r10, [fp, #+42]!");
825  COMPARE(ldr(ip, MemOperand(sp, -42, PreIndex)),
826  "e53dc02a ldr ip, [sp, #-42]!");
827  COMPARE(ldr(r0, MemOperand(r1, r2)),
828  "e7910002 ldr r0, [r1, +r2]");
829  COMPARE(ldr(r0, MemOperand(r1, r2, NegOffset)),
830  "e7110002 ldr r0, [r1, -r2]");
831  COMPARE(ldr(r0, MemOperand(r1, r2, PostIndex)),
832  "e6910002 ldr r0, [r1], +r2");
833  COMPARE(ldr(r0, MemOperand(r1, r2, NegPostIndex)),
834  "e6110002 ldr r0, [r1], -r2");
835  COMPARE(ldr(r0, MemOperand(r1, r2, PreIndex)),
836  "e7b10002 ldr r0, [r1, +r2]!");
837  COMPARE(ldr(r0, MemOperand(r1, r2, NegPreIndex)),
838  "e7310002 ldr r0, [r1, -r2]!");
839 
840  COMPARE(str(r0, MemOperand(r1)),
841  "e5810000 str r0, [r1, #+0]");
842  COMPARE(str(r2, MemOperand(r3, 42)),
843  "e583202a str r2, [r3, #+42]");
844  COMPARE(str(r4, MemOperand(r5, -42)),
845  "e505402a str r4, [r5, #-42]");
846  COMPARE(str(r6, MemOperand(r7, 42, PostIndex)),
847  "e487602a str r6, [r7], #+42");
848  COMPARE(str(r8, MemOperand(r9, -42, PostIndex)),
849  "e409802a str r8, [r9], #-42");
850  COMPARE(str(r10, MemOperand(fp, 42, PreIndex)),
851  "e5aba02a str r10, [fp, #+42]!");
852  COMPARE(str(ip, MemOperand(sp, -42, PreIndex)),
853  "e52dc02a str ip, [sp, #-42]!");
854  COMPARE(str(r0, MemOperand(r1, r2)),
855  "e7810002 str r0, [r1, +r2]");
856  COMPARE(str(r0, MemOperand(r1, r2, NegOffset)),
857  "e7010002 str r0, [r1, -r2]");
858  COMPARE(str(r0, MemOperand(r1, r2, PostIndex)),
859  "e6810002 str r0, [r1], +r2");
860  COMPARE(str(r0, MemOperand(r1, r2, NegPostIndex)),
861  "e6010002 str r0, [r1], -r2");
862  COMPARE(str(r0, MemOperand(r1, r2, PreIndex)),
863  "e7a10002 str r0, [r1, +r2]!");
864  COMPARE(str(r0, MemOperand(r1, r2, NegPreIndex)),
865  "e7210002 str r0, [r1, -r2]!");
866 
867  if (CpuFeatures::IsSupported(ARMv7)) {
868  CpuFeatureScope scope(&assm, ARMv7);
869  COMPARE(ldrd(r0, r1, MemOperand(r1)),
870  "e1c100d0 ldrd r0, [r1, #+0]");
871  COMPARE(ldrd(r2, r3, MemOperand(r3, 127)),
872  "e1c327df ldrd r2, [r3, #+127]");
873  COMPARE(ldrd(r4, r5, MemOperand(r5, -127)),
874  "e14547df ldrd r4, [r5, #-127]");
875  COMPARE(ldrd(r6, r7, MemOperand(r7, 127, PostIndex)),
876  "e0c767df ldrd r6, [r7], #+127");
877  COMPARE(ldrd(r8, r9, MemOperand(r9, -127, PostIndex)),
878  "e04987df ldrd r8, [r9], #-127");
879  COMPARE(ldrd(r10, fp, MemOperand(fp, 127, PreIndex)),
880  "e1eba7df ldrd r10, [fp, #+127]!");
881  COMPARE(ldrd(ip, sp, MemOperand(sp, -127, PreIndex)),
882  "e16dc7df ldrd ip, [sp, #-127]!");
883 
884  COMPARE(strd(r0, r1, MemOperand(r1)),
885  "e1c100f0 strd r0, [r1, #+0]");
886  COMPARE(strd(r2, r3, MemOperand(r3, 127)),
887  "e1c327ff strd r2, [r3, #+127]");
888  COMPARE(strd(r4, r5, MemOperand(r5, -127)),
889  "e14547ff strd r4, [r5, #-127]");
890  COMPARE(strd(r6, r7, MemOperand(r7, 127, PostIndex)),
891  "e0c767ff strd r6, [r7], #+127");
892  COMPARE(strd(r8, r9, MemOperand(r9, -127, PostIndex)),
893  "e04987ff strd r8, [r9], #-127");
894  COMPARE(strd(r10, fp, MemOperand(fp, 127, PreIndex)),
895  "e1eba7ff strd r10, [fp, #+127]!");
896  COMPARE(strd(ip, sp, MemOperand(sp, -127, PreIndex)),
897  "e16dc7ff strd ip, [sp, #-127]!");
898 
899  COMPARE(pld(MemOperand(r1, 0)),
900  "f5d1f000 pld [r1]");
901  COMPARE(pld(MemOperand(r2, 128)),
902  "f5d2f080 pld [r2, #+128]");
903  }
904 
905  VERIFY_RUN();
906 }
v8::internal::s2
const SwVfpRegister s2
Definition: assembler-arm.h:398
EMIT_PENDING_LITERALS
#define EMIT_PENDING_LITERALS()
Definition: test-disasm-arm.cc:88
COMPARE
#define COMPARE(asm_, compare_string)
Definition: test-disasm-arm.cc:79
v8::internal::r3
const Register r3
Definition: assembler-arm.h:228
v8::internal::q4
const QwNeonRegister q4
Definition: assembler-arm.h:467
v8::internal::d0
const LowDwVfpRegister d0
Definition: assembler-arm.h:430
v8::internal::d23
const DwVfpRegister d23
Definition: assembler-arm.h:453
v8::internal::d31
const DwVfpRegister d31
Definition: assembler-arm.h:461
v8::internal::s16
const SwVfpRegister s16
Definition: assembler-arm.h:412
v8::internal::r6
const Register r6
Definition: assembler-arm.h:231
v8::internal::CpuFeatures::IsSupported
static bool IsSupported(CpuFeature f)
Definition: assembler-arm.h:68
VERIFY_RUN
#define VERIFY_RUN()
Definition: test-disasm-arm.cc:94
v8::internal::d15
const LowDwVfpRegister d15
Definition: assembler-arm.h:445
v8::internal::d3
const LowDwVfpRegister d3
Definition: assembler-arm.h:433
v8::internal::r2
const Register r2
Definition: assembler-arm.h:227
v8::internal::d25
const DwVfpRegister d25
Definition: assembler-arm.h:455
v8::internal::VmovIndexHi
const VmovIndex VmovIndexHi
Definition: assembler-arm.h:769
v8::internal::s31
const SwVfpRegister s31
Definition: assembler-arm.h:427
v8::internal::byte
uint8_t byte
Definition: globals.h:185
v8::internal::d16
const DwVfpRegister d16
Definition: assembler-arm.h:446
v8::internal::sp
const Register sp
Definition: assembler-arm.h:242
v8::internal::s3
const SwVfpRegister s3
Definition: assembler-arm.h:399
v8::internal::Vector::start
T * start() const
Definition: utils.h:426
v8::internal::d18
const DwVfpRegister d18
Definition: assembler-arm.h:448
v8::internal::d14
const LowDwVfpRegister d14
Definition: assembler-arm.h:444
v8::internal::d17
const DwVfpRegister d17
Definition: assembler-arm.h:447
v8::internal::d7
const LowDwVfpRegister d7
Definition: assembler-arm.h:437
v8::internal::d4
const LowDwVfpRegister d4
Definition: assembler-arm.h:434
disasm::Disassembler::InstructionDecode
int InstructionDecode(v8::internal::Vector< char > buffer, byte *instruction)
v8::internal::ip
const Register ip
Definition: assembler-arm.h:241
v8::internal::d6
const LowDwVfpRegister d6
Definition: assembler-arm.h:436
v8::internal::r9
const Register r9
Definition: assembler-arm.h:237
v8::internal::d27
const DwVfpRegister d27
Definition: assembler-arm.h:457
v8::internal::d5
const LowDwVfpRegister d5
Definition: assembler-arm.h:435
v8::internal::pc
const Register pc
Definition: assembler-arm.h:244
v8::internal::s0
const SwVfpRegister s0
Definition: assembler-arm.h:396
v8::internal::r0
const Register r0
Definition: assembler-arm.h:225
SET_UP
#define SET_UP()
Definition: test-disasm-arm.cc:66
v8::internal::d26
const DwVfpRegister d26
Definition: assembler-arm.h:456
v8::internal::s5
const SwVfpRegister s5
Definition: assembler-arm.h:401
v8::internal::s1
const SwVfpRegister s1
Definition: assembler-arm.h:397
v8::internal::lr
const Register lr
Definition: assembler-arm.h:243
v8::internal::d2
const LowDwVfpRegister d2
Definition: assembler-arm.h:432
v8::internal::r1
const Register r1
Definition: assembler-arm.h:226
v8::internal::q3
const QwNeonRegister q3
Definition: assembler-arm.h:466
v8::internal::VmovIndexLo
const VmovIndex VmovIndexLo
Definition: assembler-arm.h:768
v8::internal::r8
const Register r8
Definition: assembler-arm.h:235
v8::internal::d30
const DwVfpRegister d30
Definition: assembler-arm.h:460
v8::internal::d20
const DwVfpRegister d20
Definition: assembler-arm.h:450
DisassembleAndCompare
bool DisassembleAndCompare(byte *pc, const char *compare_string)
Definition: test-disasm-arm.cc:43
v8::internal::r10
const Register r10
Definition: assembler-arm.h:239
v8::internal::d1
const LowDwVfpRegister d1
Definition: assembler-arm.h:431
v8::internal::fp
const Register fp
Definition: assembler-arm.h:240
v8::internal::s15
const SwVfpRegister s15
Definition: assembler-arm.h:411
v8::internal::r5
const Register r5
Definition: assembler-arm.h:230
v8::internal::r4
const Register r4
Definition: assembler-arm.h:229
v8::internal::r7
const Register r7
Definition: assembler-arm.h:233