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constants-arm.h File Reference
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Data Structures

class  Instruction
 
class  Registers
 
struct  Registers::RegisterAlias
 
class  VFPRegisters
 

Namespaces

 v8
 
 v8::internal
 

Macros

#define USE_THUMB_INTERWORK   1
 
#define CAN_USE_ARMV5_INSTRUCTIONS   1
 
#define CAN_USE_THUMB_INSTRUCTIONS   1
 
#define CAN_USE_UNALIGNED_ACCESSES   1
 
#define V8_TARGET_CAN_READ_UNALIGNED   1
 
#define USE_BLX   1
 
#define DECLARE_STATIC_TYPED_ACCESSOR(return_type, Name)
 
#define DECLARE_STATIC_ACCESSOR(Name)   DECLARE_STATIC_TYPED_ACCESSOR(int, Name)
 

Typedefs

typedef int32_t Instr
 
typedef uint32_t SRegisterFieldMask
 

Enumerations

enum  Condition {
  kNoCondition = -1, eq = 0 << 28, ne = 1 << 28, cs = 2 << 28,
  cc = 3 << 28, mi = 4 << 28, pl = 5 << 28, vs = 6 << 28,
  vc = 7 << 28, hi = 8 << 28, ls = 9 << 28, ge = 10 << 28,
  lt = 11 << 28, gt = 12 << 28, le = 13 << 28, al = 14 << 28,
  kSpecialCondition = 15 << 28, kNumberOfConditions = 16, hs = cs, lo = cc,
  no_condition = -1, overflow = 0, no_overflow = 1, below = 2,
  above_equal = 3, equal = 4, not_equal = 5, below_equal = 6,
  above = 7, negative = 8, positive = 9, parity_even = 10,
  parity_odd = 11, less = 12, greater_equal = 13, less_equal = 14,
  greater = 15, carry = below, not_carry = above_equal, zero = equal,
  not_zero = not_equal, sign = negative, not_sign = positive, kNoCondition = -1,
  overflow = 0, no_overflow = 1, Uless = 2, Ugreater_equal = 3,
  equal = 4, not_equal = 5, Uless_equal = 6, Ugreater = 7,
  negative = 8, positive = 9, parity_even = 10, parity_odd = 11,
  less = 12, greater_equal = 13, less_equal = 14, greater = 15,
  cc_always = 16, carry = below, not_carry = above_equal, zero = equal,
  eq = 0 << 28, not_zero = not_equal, ne = 1 << 28, nz = not_equal,
  sign = negative, not_sign = positive, mi = 4 << 28, pl = 5 << 28,
  hi = 8 << 28, ls = 9 << 28, ge = 10 << 28, lt = 11 << 28,
  gt = 12 << 28, le = 13 << 28, hs = cs, lo = cc,
  al = 14 << 28, cc_default = kNoCondition, no_condition = -1, overflow = 0,
  no_overflow = 1, below = 2, above_equal = 3, equal = 4,
  not_equal = 5, below_equal = 6, above = 7, negative = 8,
  positive = 9, parity_even = 10, parity_odd = 11, less = 12,
  greater_equal = 13, less_equal = 14, greater = 15, always = 16,
  never = 17, carry = below, not_carry = above_equal, zero = equal,
  not_zero = not_equal, sign = negative, not_sign = positive, last_condition = greater
}
 
enum  Opcode {
  AND = 0 << 21, EOR = 1 << 21, SUB = 2 << 21, RSB = 3 << 21,
  ADD = 4 << 21, ADC = 5 << 21, SBC = 6 << 21, RSC = 7 << 21,
  TST = 8 << 21, TEQ = 9 << 21, CMP = 10 << 21, CMN = 11 << 21,
  ORR = 12 << 21, MOV = 13 << 21, BIC = 14 << 21, MVN = 15 << 21,
  SPECIAL = 0 << kOpcodeShift, REGIMM = 1 << kOpcodeShift, J = ((0 << 3) + 2) << kOpcodeShift, JAL = ((0 << 3) + 3) << kOpcodeShift,
  BEQ = ((0 << 3) + 4) << kOpcodeShift, BNE = ((0 << 3) + 5) << kOpcodeShift, BLEZ = ((0 << 3) + 6) << kOpcodeShift, BGTZ = ((0 << 3) + 7) << kOpcodeShift,
  ADDI = ((1 << 3) + 0) << kOpcodeShift, ADDIU = ((1 << 3) + 1) << kOpcodeShift, SLTI = ((1 << 3) + 2) << kOpcodeShift, SLTIU = ((1 << 3) + 3) << kOpcodeShift,
  ANDI = ((1 << 3) + 4) << kOpcodeShift, ORI = ((1 << 3) + 5) << kOpcodeShift, XORI = ((1 << 3) + 6) << kOpcodeShift, LUI = ((1 << 3) + 7) << kOpcodeShift,
  COP1 = ((2 << 3) + 1) << kOpcodeShift, BEQL = ((2 << 3) + 4) << kOpcodeShift, BNEL = ((2 << 3) + 5) << kOpcodeShift, BLEZL = ((2 << 3) + 6) << kOpcodeShift,
  BGTZL = ((2 << 3) + 7) << kOpcodeShift, SPECIAL2 = ((3 << 3) + 4) << kOpcodeShift, SPECIAL3 = ((3 << 3) + 7) << kOpcodeShift, LB = ((4 << 3) + 0) << kOpcodeShift,
  LH = ((4 << 3) + 1) << kOpcodeShift, LWL = ((4 << 3) + 2) << kOpcodeShift, LW = ((4 << 3) + 3) << kOpcodeShift, LBU = ((4 << 3) + 4) << kOpcodeShift,
  LHU = ((4 << 3) + 5) << kOpcodeShift, LWR = ((4 << 3) + 6) << kOpcodeShift, SB = ((5 << 3) + 0) << kOpcodeShift, SH = ((5 << 3) + 1) << kOpcodeShift,
  SWL = ((5 << 3) + 2) << kOpcodeShift, SW = ((5 << 3) + 3) << kOpcodeShift, SWR = ((5 << 3) + 6) << kOpcodeShift, LWC1 = ((6 << 3) + 1) << kOpcodeShift,
  LDC1 = ((6 << 3) + 5) << kOpcodeShift, SWC1 = ((7 << 3) + 1) << kOpcodeShift, SDC1 = ((7 << 3) + 5) << kOpcodeShift
}
 
enum  MiscInstructionsBits74 {
  BX = 1 << 4, BXJ = 2 << 4, BLX = 3 << 4, BKPT = 7 << 4,
  CLZ = 1 << 4
}
 
enum  {
  H = 1 << 5, S6 = 1 << 6, L = 1 << 20, S = 1 << 20,
  W = 1 << 21, A = 1 << 21, B = 1 << 22, N = 1 << 22,
  U = 1 << 23, P = 1 << 24, I = 1 << 25, B4 = 1 << 4,
  B5 = 1 << 5, B6 = 1 << 6, B7 = 1 << 7, B8 = 1 << 8,
  B9 = 1 << 9, B12 = 1 << 12, B16 = 1 << 16, B18 = 1 << 18,
  B19 = 1 << 19, B20 = 1 << 20, B21 = 1 << 21, B22 = 1 << 22,
  B23 = 1 << 23, B24 = 1 << 24, B25 = 1 << 25, B26 = 1 << 26,
  B27 = 1 << 27, B28 = 1 << 28, kCondMask = 15 << 28, kALUMask = 0x6f << 21,
  kRdMask = 15 << 12, kCoprocessorMask = 15 << 8, kOpCodeMask = 15 << 21, kImm24Mask = (1 << 24) - 1,
  kOff12Mask = (1 << 12) - 1
}
 
enum  SBit { SetCC = 1 << 20, LeaveCC = 0 << 20 }
 
enum  SRegister { CPSR = 0 << 22, SPSR = 1 << 22 }
 
enum  ShiftOp {
  LSL = 0 << 5, LSR = 1 << 5, ASR = 2 << 5, ROR = 3 << 5,
  RRX = -1, kNumberOfShifts = 4
}
 
enum  SRegisterField {
  CPSR_c = CPSR | 1 << 16, CPSR_x = CPSR | 1 << 17, CPSR_s = CPSR | 1 << 18, CPSR_f = CPSR | 1 << 19,
  SPSR_c = SPSR | 1 << 16, SPSR_x = SPSR | 1 << 17, SPSR_s = SPSR | 1 << 18, SPSR_f = SPSR | 1 << 19
}
 
enum  AddrMode {
  Offset = (8|4|0) << 21, PreIndex = (8|4|1) << 21, PostIndex = (0|4|0) << 21, NegOffset = (8|0|0) << 21,
  NegPreIndex = (8|0|1) << 21, NegPostIndex = (0|0|0) << 21
}
 
enum  BlockAddrMode {
  da = (0|0|0) << 21, ia = (0|4|0) << 21, db = (8|0|0) << 21, ib = (8|4|0) << 21,
  da_w = (0|0|1) << 21, ia_w = (0|4|1) << 21, db_w = (8|0|1) << 21, ib_w = (8|4|1) << 21,
  da_x = (0|0|0) << 21, ia_x = (0|4|0) << 21, db_x = (8|0|0) << 21, ib_x = (8|4|0) << 21,
  kBlockAddrModeMask = (8|4|1) << 21
}
 
enum  LFlag { Long = 1 << 22, Short = 0 << 22 }
 
enum  SoftwareInterruptCodes { kCallRtRedirected = 0x10, kBreakpoint = 0x20, kStopCode = 1 << 23, call_rt_redirected = 0xfffff }
 
enum  VFPRegPrecision { kSinglePrecision = 0, kDoublePrecision = 1 }
 
enum  VFPConversionMode { kFPSCRRounding = 0, kDefaultRoundToZero = 1 }
 
enum  VFPRoundingMode {
  RN = 0 << 22, RP = 1 << 22, RM = 2 << 22, RZ = 3 << 22,
  kRoundToNearest = RN, kRoundToPlusInf = RP, kRoundToMinusInf = RM, kRoundToZero = RZ
}
 
enum  CheckForInexactConversion { kCheckForInexactConversion, kDontCheckForInexactConversion, kCheckForInexactConversion, kDontCheckForInexactConversion }
 
enum  Hint { no_hint = 0, no_hint = 0 }
 

Functions

Condition NegateCondition (Condition cond)
 
Condition ReverseCondition (Condition cond)
 
Hint NegateHint (Hint ignored)
 

Variables

const int kConstantPoolMarkerMask = 0xffe00000
 
const int kConstantPoolMarker = 0x0c000000
 
const int kConstantPoolLengthMask = 0x001ffff
 
const int kNumRegisters = 16
 
const int kNumVFPSingleRegisters = 32
 
const int kNumVFPDoubleRegisters = 16
 
const int kNumVFPRegisters = kNumVFPSingleRegisters + kNumVFPDoubleRegisters
 
const int kPCRegister = 15
 
const int kNoRegister = -1
 
const uint32_t kStopCodeMask = kStopCode - 1
 
const uint32_t kMaxStopCode = kStopCode - 1
 
const int32_t kDefaultStopCode = -1
 
const uint32_t kVFPExceptionMask = 0xf
 
const uint32_t kVFPInvalidOpExceptionBit = 1 << 0
 
const uint32_t kVFPOverflowExceptionBit = 1 << 2
 
const uint32_t kVFPUnderflowExceptionBit = 1 << 3
 
const uint32_t kVFPInexactExceptionBit = 1 << 4
 
const uint32_t kVFPFlushToZeroMask = 1 << 24
 
const uint32_t kVFPNConditionFlagBit = 1 << 31
 
const uint32_t kVFPZConditionFlagBit = 1 << 30
 
const uint32_t kVFPCConditionFlagBit = 1 << 29
 
const uint32_t kVFPVConditionFlagBit = 1 << 28
 
const uint32_t kVFPRoundingModeMask = 3 << 22
 
const Instr kPopInstruction
 
const Instr kPushRegPattern
 
const Instr kPopRegPattern
 
const Instr kLdrRegFpOffsetPattern
 
const Instr kStrRegFpOffsetPattern
 
const Instr kLdrRegFpNegOffsetPattern
 
const Instr kStrRegFpNegOffsetPattern
 
const Instr kLdrStrInstrTypeMask
 
const Instr kLdrStrInstrArgumentMask
 
const Instr kLdrStrOffsetMask
 

Macro Definition Documentation

#define CAN_USE_ARMV5_INSTRUCTIONS   1

Definition at line 68 of file constants-arm.h.

#define CAN_USE_THUMB_INSTRUCTIONS   1

Definition at line 69 of file constants-arm.h.

#define CAN_USE_UNALIGNED_ACCESSES   1

Definition at line 72 of file constants-arm.h.

#define DECLARE_STATIC_ACCESSOR (   Name)    DECLARE_STATIC_TYPED_ACCESSOR(int, Name)

Definition at line 526 of file constants-arm.h.

#define DECLARE_STATIC_TYPED_ACCESSOR (   return_type,
  Name 
)
Value:
static inline return_type Name(Instr instr) { \
char* temp = reinterpret_cast<char*>(&instr); \
return reinterpret_cast<Instruction*>(temp)->Name(); \
}

Definition at line 520 of file constants-arm.h.

#define USE_BLX   1

Definition at line 83 of file constants-arm.h.

#define USE_THUMB_INTERWORK   1

Definition at line 40 of file constants-arm.h.

#define V8_TARGET_CAN_READ_UNALIGNED   1

Definition at line 78 of file constants-arm.h.