43 result_assigned_(
false),
46 factory_(isolate(), zone) { }
64 bool result_assigned_;
76 result_assigned_ =
true;
78 return factory()->NewAssignment(
79 Token::ASSIGN, result_proxy, value, RelocInfo::kNoPosition);
83 #define DEF_VISIT(type) \
84 virtual void Visit##type(type* node);
88 void VisitIterationStatement(IterationStatement* stmt);
93 for (
int i = statements->length() - 1; i >= 0; --i) {
94 Visit(statements->
at(i));
99 void Processor::VisitBlock(
Block* node) {
112 void Processor::VisitExpressionStatement(ExpressionStatement* node) {
114 if (!is_set_ && !node->expression()->IsThrow()) {
115 node->set_expression(SetResult(node->expression()));
116 if (!in_try_) is_set_ =
true;
121 void Processor::VisitIfStatement(IfStatement* node) {
124 Visit(node->else_statement());
125 bool set_after_then = is_set_;
127 Visit(node->then_statement());
128 is_set_ = is_set_ && set_after_then;
132 void Processor::VisitIterationStatement(IterationStatement* node) {
134 bool set_after_loop = is_set_;
136 is_set_ = is_set_ && set_after_loop;
140 void Processor::VisitDoWhileStatement(DoWhileStatement* node) {
141 VisitIterationStatement(node);
145 void Processor::VisitWhileStatement(WhileStatement* node) {
146 VisitIterationStatement(node);
150 void Processor::VisitForStatement(ForStatement* node) {
151 VisitIterationStatement(node);
155 void Processor::VisitForInStatement(ForInStatement* node) {
156 VisitIterationStatement(node);
160 void Processor::VisitTryCatchStatement(TryCatchStatement* node) {
162 bool set_after_catch = is_set_;
163 Visit(node->catch_block());
164 is_set_ = is_set_ && set_after_catch;
167 Visit(node->try_block());
172 void Processor::VisitTryFinallyStatement(TryFinallyStatement* node) {
174 Visit(node->finally_block());
177 Visit(node->try_block());
182 void Processor::VisitSwitchStatement(SwitchStatement* node) {
184 ZoneList<CaseClause*>* clauses = node->cases();
185 bool set_after_switch = is_set_;
186 for (
int i = clauses->length() - 1; i >= 0; --i) {
187 CaseClause* clause = clauses->at(i);
190 is_set_ = is_set_ && set_after_switch;
194 void Processor::VisitContinueStatement(ContinueStatement* node) {
199 void Processor::VisitBreakStatement(BreakStatement* node) {
204 void Processor::VisitWithStatement(WithStatement* node) {
205 bool set_after_body = is_set_;
206 Visit(node->statement());
207 is_set_ = is_set_ && set_after_body;
212 void Processor::VisitVariableDeclaration(VariableDeclaration* node) {}
213 void Processor::VisitFunctionDeclaration(FunctionDeclaration* node) {}
214 void Processor::VisitModuleDeclaration(ModuleDeclaration* node) {}
215 void Processor::VisitImportDeclaration(ImportDeclaration* node) {}
216 void Processor::VisitExportDeclaration(ExportDeclaration* node) {}
217 void Processor::VisitModuleLiteral(ModuleLiteral* node) {}
218 void Processor::VisitModuleVariable(ModuleVariable* node) {}
219 void Processor::VisitModulePath(ModulePath* node) {}
220 void Processor::VisitModuleUrl(ModuleUrl* node) {}
221 void Processor::VisitEmptyStatement(EmptyStatement* node) {}
222 void Processor::VisitReturnStatement(ReturnStatement* node) {}
223 void Processor::VisitDebuggerStatement(DebuggerStatement* node) {}
227 #define DEF_VISIT(type) \
228 void Processor::Visit##type(type* expr) { UNREACHABLE(); }
238 Scope* scope =
function->scope();
243 if (!body->is_empty()) {
248 if (processor.HasStackOverflow())
return false;
250 if (processor.result_assigned()) {
251 ASSERT(function->end_position() != RelocInfo::kNoPosition);
258 int position =
function->end_position();
259 VariableProxy* result_proxy = processor.factory()->NewVariableProxy(
261 result_proxy->
BindTo(result);
263 processor.factory()->NewReturnStatement(result_proxy);
265 body->
Add(result_statement, info->
zone());
bool is_global_scope() const
AstNodeFactory< AstNullVisitor > * factory()
Processor(Variable *result, Zone *zone)
bool result_assigned() const
#define ASSERT(condition)
Variable * NewTemporary(Handle< String > name)
void Process(ZoneList< Statement * > *statements)
Handle< String > name() const
static Interface * NewValue()
bool is_eval_scope() const
FunctionLiteral * function() const
ZoneList< Statement * > * statements()
activate correct semantics for inheriting readonliness false
void set_statement_pos(int statement_pos)
void BindTo(Variable *var)
void Add(const T &element, AllocationPolicy allocator=AllocationPolicy())
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 and VFP2 enable use of VFP2 instructions if available enable use of SDIV and UDIV instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of MIPS FPU instructions if NULL
bool is_initializer_block() const
#define EXPRESSION_NODE_LIST(V)
static bool Rewrite(CompilationInfo *info)