28 #ifndef V8_ARM_CODE_STUBS_ARM_H_
29 #define V8_ARM_CODE_STUBS_ARM_H_
48 : type_(type), argument_type_(argument_type) { }
56 int MinorKey() {
return type_ | argument_type_; }
64 : save_doubles_(save_fp) { }
75 Major MajorKey() {
return StoreBufferOverflow; }
76 int MinorKey() {
return (save_doubles_ ==
kSaveFPRegs) ? 1 : 0; }
87 operand_type_(operand_type) {
99 class ModeBits:
public BitField<UnaryOverwriteMode, 0, 1> {};
100 class OpBits:
public BitField<Token::Value, 1, 7> {};
101 class OperandTypeInfoBits:
public BitField<UnaryOpIC::TypeInfo, 8, 3> {};
103 Major MajorKey() {
return UnaryOp; }
105 return ModeBits::encode(mode_)
106 | OpBits::encode(op_)
107 | OperandTypeInfoBits::encode(operand_type_);
112 void Generate(MacroAssembler* masm);
114 void GenerateTypeTransition(MacroAssembler* masm);
116 void GenerateSmiStub(MacroAssembler* masm);
117 void GenerateSmiStubSub(MacroAssembler* masm);
118 void GenerateSmiStubBitNot(MacroAssembler* masm);
119 void GenerateSmiCodeSub(MacroAssembler* masm, Label* non_smi, Label* slow);
120 void GenerateSmiCodeBitNot(MacroAssembler* masm, Label* slow);
122 void GenerateHeapNumberStub(MacroAssembler* masm);
123 void GenerateHeapNumberStubSub(MacroAssembler* masm);
124 void GenerateHeapNumberStubBitNot(MacroAssembler* masm);
125 void GenerateHeapNumberCodeSub(MacroAssembler* masm, Label* slow);
126 void GenerateHeapNumberCodeBitNot(MacroAssembler* masm, Label* slow);
128 void GenerateGenericStub(MacroAssembler* masm);
129 void GenerateGenericStubSub(MacroAssembler* masm);
130 void GenerateGenericStubBitNot(MacroAssembler* masm);
131 void GenerateGenericCodeFallback(MacroAssembler* masm);
133 virtual int GetCodeKind() {
return Code::UNARY_OP_IC; }
139 virtual void FinishCode(Handle<Code>
code) {
140 code->set_unary_op_type(operand_type_);
160 : op_(OpBits::decode(key)),
161 mode_(ModeBits::decode(key)),
162 use_vfp2_(VFP2Bits::decode(key)),
163 operands_type_(operands_type),
164 result_type_(result_type) { }
167 enum SmiCodeGenerateHeapNumberResults {
168 ALLOW_HEAPNUMBER_RESULTS,
169 NO_HEAPNUMBER_RESULTS
180 virtual void PrintName(StringStream* stream);
183 class ModeBits:
public BitField<OverwriteMode, 0, 2> {};
184 class OpBits:
public BitField<Token::Value, 2, 7> {};
185 class VFP2Bits:
public BitField<bool, 9, 1> {};
186 class OperandTypeInfoBits:
public BitField<BinaryOpIC::TypeInfo, 10, 3> {};
187 class ResultTypeInfoBits:
public BitField<BinaryOpIC::TypeInfo, 13, 3> {};
189 Major MajorKey() {
return BinaryOp; }
191 return OpBits::encode(op_)
192 | ModeBits::encode(mode_)
193 | VFP2Bits::encode(use_vfp2_)
194 | OperandTypeInfoBits::encode(operands_type_)
195 | ResultTypeInfoBits::encode(result_type_);
198 void Generate(MacroAssembler* masm);
199 void GenerateGeneric(MacroAssembler* masm);
200 void GenerateSmiSmiOperation(MacroAssembler* masm);
201 void GenerateFPOperation(MacroAssembler* masm,
205 void GenerateSmiCode(MacroAssembler* masm,
208 SmiCodeGenerateHeapNumberResults heapnumber_results);
209 void GenerateLoadArguments(MacroAssembler* masm);
210 void GenerateReturn(MacroAssembler* masm);
211 void GenerateUninitializedStub(MacroAssembler* masm);
212 void GenerateSmiStub(MacroAssembler* masm);
213 void GenerateInt32Stub(MacroAssembler* masm);
214 void GenerateHeapNumberStub(MacroAssembler* masm);
215 void GenerateOddballStub(MacroAssembler* masm);
216 void GenerateStringStub(MacroAssembler* masm);
217 void GenerateBothStringStub(MacroAssembler* masm);
218 void GenerateGenericStub(MacroAssembler* masm);
219 void GenerateAddStrings(MacroAssembler* masm);
220 void GenerateCallRuntime(MacroAssembler* masm);
222 void GenerateHeapResultAllocation(MacroAssembler* masm,
224 Register heap_number_map,
228 void GenerateRegisterArgsPush(MacroAssembler* masm);
229 void GenerateTypeTransition(MacroAssembler* masm);
230 void GenerateTypeTransitionWithSavedArgs(MacroAssembler* masm);
232 virtual int GetCodeKind() {
return Code::BINARY_OP_IC; }
238 virtual void FinishCode(Handle<Code>
code) {
239 code->set_binary_op_type(operands_type_);
240 code->set_binary_op_result_type(result_type_);
329 Major MajorKey() {
return StringAdd; }
330 int MinorKey() {
return flags_; }
332 void Generate(MacroAssembler* masm);
334 void GenerateConvertArgument(MacroAssembler* masm,
353 int MinorKey() {
return 0; }
355 void Generate(MacroAssembler* masm);
383 virtual Major MajorKey() {
return StringCompare; }
384 virtual int MinorKey() {
return 0; }
385 virtual void Generate(MacroAssembler* masm);
387 static void GenerateAsciiCharsCompareLoop(MacroAssembler* masm,
393 Label* chars_not_equal);
406 the_heap_number_(the_heap_number),
407 scratch_(scratch) { }
418 class IntRegisterBits:
public BitField<int, 0, 4> {};
419 class HeapNumberRegisterBits:
public BitField<int, 4, 4> {};
420 class ScratchRegisterBits:
public BitField<int, 8, 4> {};
422 Major MajorKey() {
return WriteInt32ToHeapNumber; }
425 return IntRegisterBits::encode(the_int_.
code())
426 | HeapNumberRegisterBits::encode(the_heap_number_.
code())
427 | ScratchRegisterBits::encode(scratch_.
code());
430 void Generate(MacroAssembler* masm);
453 Major MajorKey() {
return NumberToString; }
454 int MinorKey() {
return 0; }
456 void Generate(MacroAssembler* masm);
470 remembered_set_action_(remembered_set_action),
471 save_fp_regs_mode_(fp_mode),
545 class RegisterAllocation {
552 scratch0_(scratch0) {
554 scratch1_ = GetRegThatIsNotOneOf(object_, address_, scratch0_);
557 void Save(MacroAssembler* masm) {
561 masm->push(scratch1_);
564 void Restore(MacroAssembler* masm) {
565 masm->pop(scratch1_);
571 void SaveCallerSaveRegisters(MacroAssembler* masm,
SaveFPRegsMode mode) {
574 CpuFeatures::Scope scope(
VFP2);
586 inline void RestoreCallerSaveRegisters(MacroAssembler*masm,
589 CpuFeatures::Scope scope(
VFP2);
602 inline Register object() {
return object_; }
603 inline Register address() {
return address_; }
604 inline Register scratch0() {
return scratch0_; }
605 inline Register scratch1() {
return scratch1_; }
613 Register GetRegThatIsNotOneOf(Register
r1,
618 if (candidate.is(r1))
continue;
619 if (candidate.is(r2))
continue;
620 if (candidate.is(r3))
continue;
629 enum OnNoNeedToInformIncrementalMarker {
630 kReturnOnNoNeedToInformIncrementalMarker,
631 kUpdateRememberedSetOnNoNeedToInformIncrementalMarker
634 void Generate(MacroAssembler* masm);
635 void GenerateIncremental(MacroAssembler* masm,
Mode mode);
636 void CheckNeedsToInformIncrementalMarker(
637 MacroAssembler* masm,
638 OnNoNeedToInformIncrementalMarker on_no_need,
640 void InformIncrementalMarker(MacroAssembler* masm,
Mode mode);
642 Major MajorKey() {
return RecordWrite; }
645 return ObjectBits::encode(object_.
code()) |
646 ValueBits::encode(value_.
code()) |
647 AddressBits::encode(address_.
code()) |
648 RememberedSetActionBits::encode(remembered_set_action_) |
649 SaveFPRegsModeBits::encode(save_fp_regs_mode_);
652 void Activate(Code* code) {
653 code->GetHeap()->incremental_marking()->ActivateGeneratedStub(code);
656 class ObjectBits:
public BitField<int, 0, 4> {};
657 class ValueBits:
public BitField<int, 4, 4> {};
658 class AddressBits:
public BitField<int, 8, 4> {};
659 class RememberedSetActionBits:
public BitField<RememberedSetAction, 12, 1> {};
660 class SaveFPRegsModeBits:
public BitField<SaveFPRegsMode, 13, 1> {};
668 RegisterAllocation regs_;
682 Major MajorKey() {
return RegExpCEntry; }
683 int MinorKey() {
return 0; }
685 bool NeedsImmovableCode() {
return true; }
702 Major MajorKey() {
return DirectCEntry; }
703 int MinorKey() {
return 0; }
705 bool NeedsImmovableCode() {
return true; }
880 static const int kInlinedProbes = 4;
881 static const int kTotalProbes = 20;
883 static const int kCapacityOffset =
887 static const int kElementsStartOffset =
891 Major MajorKey() {
return StringDictionaryLookup; }
894 return LookupModeBits::encode(mode_);
897 class LookupModeBits:
public BitField<LookupMode, 0, 1> {};
905 #endif // V8_ARM_CODE_STUBS_ARM_H_
static bool IsBranch(Instr instr)
static const int kNumRegisters
const RegList kCallerSaved
static Mode GetMode(Code *stub)
static void Patch(Code *stub, Mode mode)
static const int kElementsStartIndex
RecordWriteStub(Register object, Register value, Register address, RememberedSetAction remembered_set_action, SaveFPRegsMode fp_mode)
virtual bool SometimesSetsUpAFrame()
static void GenerateFixedRegStubsAheadOfTime()
void instr_at_put(int pos, Instr instr)
static void GenerateCopyCharacters(MacroAssembler *masm, Register dest, Register src, Register count, Register scratch, bool ascii)
UnaryOpStub(Token::Value op, UnaryOverwriteMode mode, UnaryOpIC::TypeInfo operand_type=UnaryOpIC::UNINITIALIZED)
static void LoadNumberAsInt32Double(MacroAssembler *masm, Register object, Destination destination, DwVfpRegister double_dst, DwVfpRegister double_scratch, Register dst1, Register dst2, Register heap_number_map, Register scratch1, Register scratch2, SwVfpRegister single_scratch, Label *not_int32)
virtual ~RegExpCEntryStub()
static void DoubleIs32BitInteger(MacroAssembler *masm, Register src1, Register src2, Register dst, Register scratch, Label *not_int32)
static void GenerateCopyCharactersLong(MacroAssembler *masm, Register dest, Register src, Register count, Register scratch1, Register scratch2, Register scratch3, Register scratch4, Register scratch5, int flags)
void Generate(MacroAssembler *masm)
static void GenerateHashGetHash(MacroAssembler *masm, Register hash)
static bool IsSupported(CpuFeature f)
virtual bool SometimesSetsUpAFrame()
bool AreAliased(Register r1, Register r2, Register r3, Register r4)
#define ASSERT(condition)
static void LoadOperands(MacroAssembler *masm, FloatingPointHelper::Destination destination, Register heap_number_map, Register scratch1, Register scratch2, Label *not_number)
WriteInt32ToHeapNumberStub(Register the_int, Register the_heap_number, Register scratch)
static void GenerateCompareFlatAsciiStrings(MacroAssembler *masm, Register left, Register right, Register scratch1, Register scratch2, Register scratch3, Register scratch4)
static DwVfpRegister from_code(int code)
BinaryOpStub(Token::Value op, OverwriteMode mode)
static State ToState(TypeInfo type_info)
static void GenerateNegativeLookup(MacroAssembler *masm, Label *miss, Label *done, Register receiver, Register properties, Handle< String > name, Register scratch0)
Handle< String > SubString(Handle< String > str, int start, int end, PretenureFlag pretenure)
StringDictionaryLookupStub(LookupMode mode)
static void GenerateFlatAsciiStringEquals(MacroAssembler *masm, Register left, Register right, Register scratch1, Register scratch2, Register scratch3)
byte * instruction_start()
static void LoadSmis(MacroAssembler *masm, Destination destination, Register scratch1, Register scratch2)
virtual bool IsPregenerated()
static void CallCCodeForDoubleOperation(MacroAssembler *masm, Token::Value op, Register heap_number_result, Register scratch)
static Register FromAllocationIndex(int index)
static void ConvertNumberToInt32(MacroAssembler *masm, Register object, Register dst, Register heap_number_map, Register scratch1, Register scratch2, Register scratch3, DwVfpRegister double_scratch, Label *not_int32)
static State ToState(TypeInfo type_info)
static void LoadNumberAsInt32(MacroAssembler *masm, Register object, Register dst, Register heap_number_map, Register scratch1, Register scratch2, Register scratch3, DwVfpRegister double_scratch0, DwVfpRegister double_scratch1, Label *not_int32)
static void PatchBranchIntoNop(MacroAssembler *masm, int pos)
static void GenerateHashAddCharacter(MacroAssembler *masm, Register hash, Register character)
void Generate(MacroAssembler *masm)
static bool IsTstImmediate(Instr instr)
static const int kHeaderSize
void Generate(MacroAssembler *masm)
void GenerateCall(MacroAssembler *masm, ExternalReference function)
static void GenerateFixedRegStubsAheadOfTime()
static void ConvertIntToDouble(MacroAssembler *masm, Register int_scratch, Destination destination, DwVfpRegister double_dst, Register dst1, Register dst2, Register scratch2, SwVfpRegister single_scratch)
void Generate(MacroAssembler *masm)
static void GeneratePositiveLookup(MacroAssembler *masm, Label *miss, Label *done, Register elements, Register name, Register r0, Register r1)
BinaryOpStub(int key, BinaryOpIC::TypeInfo operands_type, BinaryOpIC::TypeInfo result_type=BinaryOpIC::UNINITIALIZED)
static const int kCapacityIndex
static const int kNumAllocatableRegisters
TranscendentalCacheStub(TranscendentalCache::Type type, ArgumentType argument_type)
static void PatchNopIntoBranch(MacroAssembler *masm, int pos)
static void GenerateLookupNumberStringCache(MacroAssembler *masm, Register object, Register result, Register scratch1, Register scratch2, Register scratch3, bool object_is_smi, Label *not_found)
static const int kInstrSize
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 and VFP2 enable use of VFP2 instructions if available enable use of SDIV and UDIV instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of MIPS FPU instructions if NULL
static void GenerateFixedRegStubsAheadOfTime()
static void GenerateTwoCharacterSymbolTableProbe(MacroAssembler *masm, Register c1, Register c2, Register scratch1, Register scratch2, Register scratch3, Register scratch4, Register scratch5, Label *not_found)
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra code(assertions) for debugging") DEFINE_bool(code_comments
static void FlushICache(void *start, size_t size)
static const int kTranscendentalTypeBits
virtual bool SometimesSetsUpAFrame()
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 and VFP2 enable use of VFP2 instructions if available enable use of SDIV and UDIV instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of MIPS FPU instructions if expose natives in global object expose gc extension number of stack frames to capture disable builtin natives files print a stack trace if an assertion failure occurs use random jit cookie to mask large constants trace lazy optimization use adaptive optimizations prepare for turning on always opt minimum length for automatic enable preparsing maximum number of optimization attempts before giving up cache prototype transitions automatically set the debug break flag when debugger commands are in the queue always cause a debug break before aborting maximum length of function source code printed in a stack trace max size of the new max size of the old max size of executable always perform global GCs print one trace line following each garbage collection do not print trace line after scavenger collection print more details following each garbage collection print amount of external allocated memory after each time it is adjusted flush code that we expect not to use again before full gc do incremental marking steps track object counts and memory usage use caching Perform compaction on every full GC Never perform compaction on full GC testing only Compact code space on full incremental collections Default seed for initializing random allows verbose printing trace parsing and preparsing Check icache flushes in ARM and MIPS simulator Stack alingment in bytes in print stack trace when throwing exceptions randomize hashes to avoid predictable hash Fixed seed to use to hash property activate a timer that switches between V8 threads testing_bool_flag float flag Seed used for threading test randomness A filename with extra code to be included in the Print usage including flags
StringAddStub(StringAddFlags flags)
StoreBufferOverflowStub(SaveFPRegsMode save_fp)
virtual bool IsPregenerated()
static void GenerateHashInit(MacroAssembler *masm, Register hash, Register character)
void Generate(MacroAssembler *masm)