28 #ifndef V8_CPU_PROFILER_H_
29 #define V8_CPU_PROFILER_H_
43 class CpuProfilesCollection;
44 class ProfileGenerator;
45 class TokenEnumerator;
47 #define CODE_EVENTS_TYPE_LIST(V) \
48 V(CODE_CREATION, CodeCreateEventRecord) \
49 V(CODE_MOVE, CodeMoveEventRecord) \
50 V(SHARED_FUNC_MOVE, SharedFunctionInfoMoveEventRecord)
55 #define DECLARE_TYPE(type, ignore) type,
132 inline void Stop() { running_ =
false; }
133 INLINE(
bool running()) {
return running_; }
137 const char* prefix,
String* name,
141 String* resource_name,
int line_number,
151 void CodeDeleteEvent(
Address from);
154 const char* prefix,
String* name,
157 void AddCurrentStack();
166 union CodeEventsContainer {
168 #define DECLARE_CLASS(ignore, type) type type##_;
174 bool ProcessCodeEvent(
unsigned* dequeue_order);
175 bool ProcessTicks(
unsigned dequeue_order);
179 ProfileGenerator* generator_;
181 UnboundQueue<CodeEventsContainer> events_buffer_;
182 SamplingCircularQueue ticks_buffer_;
183 UnboundQueue<TickSampleEventRecord> ticks_from_vm_buffer_;
184 unsigned enqueue_order_;
190 #define PROFILE(isolate, Call) \
191 LOG_CODE_EVENT(isolate, Call); \
193 if (v8::internal::CpuProfiler::is_profiling(isolate)) { \
194 v8::internal::CpuProfiler::Call; \
207 static void TearDown();
209 static void StartProfiling(
const char* title);
210 static void StartProfiling(
String* title);
211 static CpuProfile* StopProfiling(
const char* title);
213 static int GetProfilesCount();
216 static void DeleteAllProfiles();
217 static void DeleteProfile(
CpuProfile* profile);
218 static bool HasDetachedProfiles();
225 static void CallbackEvent(
String* name,
Address entry_point);
237 String* source,
int line);
239 Code* code,
int args_count);
242 static void CodeDeleteEvent(
Address from);
243 static void GetterCallbackEvent(
String* name,
Address entry_point);
244 static void RegExpCodeCreateEvent(
Code* code,
String* source);
245 static void SetterCallbackEvent(
String* name,
Address entry_point);
246 static void SharedFunctionInfoMoveEvent(
Address from,
Address to);
258 void StartCollectingProfile(
const char* title);
259 void StartCollectingProfile(
String* title);
260 void StartProcessorIfNotStarted();
261 CpuProfile* StopCollectingProfile(
const char* title);
263 void StopProcessorIfLastProfile(
const char* title);
264 void StopProcessor();
265 void ResetProfiles();
268 unsigned next_profile_uid_;
272 int saved_logging_nesting_;
273 bool need_to_stop_sampler_;
283 #endif // V8_CPU_PROFILER_H_
#define CODE_EVENTS_TYPE_LIST(V)
#define ASSERT(condition)
#define DISALLOW_COPY_AND_ASSIGN(TypeName)
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 and VFP2 enable use of VFP2 instructions if available enable use of SDIV and UDIV instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of MIPS FPU instructions if expose natives in global object expose gc extension number of stack frames to capture disable builtin natives files print a stack trace if an assertion failure occurs use random jit cookie to mask large constants trace lazy optimization use adaptive optimizations prepare for turning on always opt minimum length for automatic enable preparsing maximum number of optimization attempts before giving up cache prototype transitions automatically set the debug break flag when debugger commands are in the queue always cause a debug break before aborting maximum length of function source code printed in a stack trace max size of the new max size of the old max size of executable always perform global GCs print one trace line following each garbage collection do not print trace line after scavenger collection print more details following each garbage collection print amount of external allocated memory after each time it is adjusted flush code that we expect not to use again before full gc do incremental marking steps track object counts and memory usage use caching Perform compaction on every full GC Never perform compaction on full GC testing only Compact code space on full incremental collections Default seed for initializing random generator(0, the default, means to use system random).") DEFINE_bool(use_verbose_printer
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra code(assertions) for debugging") DEFINE_bool(code_comments
Atomic32 NoBarrier_Load(volatile const Atomic32 *ptr)
TickSampleEventRecord(unsigned order)
static TickSampleEventRecord * cast(void *value)
INLINE(static HeapObject *EnsureDoubleAligned(Heap *heap, HeapObject *object, int size))
virtual ~ProfilerEventsProcessor()
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 and VFP2 enable use of VFP2 instructions if available enable use of SDIV and UDIV instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of MIPS FPU instructions if NULL
static void CodeMovingGCEvent()
static INLINE(bool is_profiling(Isolate *isolate))
#define DECLARE_CLASS(ignore, type)
#define DECLARE_TYPE(type, ignore)