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test-disasm-arm.cc
Go to the documentation of this file.
1
// Copyright 2011 the V8 project authors. All rights reserved.
2
// Redistribution and use in source and binary forms, with or without
3
// modification, are permitted provided that the following conditions are
4
// met:
5
//
6
// * Redistributions of source code must retain the above copyright
7
// notice, this list of conditions and the following disclaimer.
8
// * Redistributions in binary form must reproduce the above
9
// copyright notice, this list of conditions and the following
10
// disclaimer in the documentation and/or other materials provided
11
// with the distribution.
12
// * Neither the name of Google Inc. nor the names of its
13
// contributors may be used to endorse or promote products derived
14
// from this software without specific prior written permission.
15
//
16
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
//
28
29
#include <stdlib.h>
30
31
#include "v8.h"
32
33
#include "
debug.h
"
34
#include "
disasm.h
"
35
#include "
disassembler.h
"
36
#include "
macro-assembler.h
"
37
#include "
serialize.h
"
38
#include "
cctest.h
"
39
40
using namespace
v8::internal;
41
42
43
static
v8::Persistent<v8::Context>
env;
44
45
static
void
InitializeVM() {
46
if
(env.
IsEmpty
()) {
47
env =
v8::Context::New
();
48
}
49
}
50
51
52
bool
DisassembleAndCompare
(
byte
*
pc
,
const
char
* compare_string) {
53
disasm::NameConverter
converter;
54
disasm::Disassembler
disasm(converter);
55
EmbeddedVector<char, 128>
disasm_buffer;
56
57
disasm.
InstructionDecode
(disasm_buffer, pc);
58
59
if
(strcmp(compare_string, disasm_buffer.
start
()) != 0) {
60
fprintf(stderr,
61
"expected: \n"
62
"%s\n"
63
"disassembled: \n"
64
"%s\n\n"
,
65
compare_string, disasm_buffer.
start
());
66
return
false
;
67
}
68
return
true
;
69
}
70
71
72
// Set up V8 to a state where we can at least run the assembler and
73
// disassembler. Declare the variables and allocate the data structures used
74
// in the rest of the macros.
75
#define SET_UP() \
76
InitializeVM(); \
77
v8::HandleScope scope; \
78
byte *buffer = reinterpret_cast<byte*>(malloc(4*1024)); \
79
Assembler assm(Isolate::Current(), buffer, 4*1024); \
80
bool failure = false;
81
82
83
// This macro assembles one instruction using the preallocated assembler and
84
// disassembles the generated instruction, comparing the output to the expected
85
// value. If the comparison fails an error message is printed, but the test
86
// continues to run until the end.
87
#define COMPARE(asm_, compare_string) \
88
{ \
89
int pc_offset = assm.pc_offset(); \
90
byte *progcounter = &buffer[pc_offset]; \
91
assm.asm_; \
92
if (!DisassembleAndCompare(progcounter, compare_string)) failure = true; \
93
}
94
95
// Force emission of any pending literals into a pool.
96
#define EMIT_PENDING_LITERALS() \
97
assm.CheckConstPool(true, false)
98
99
100
// Verify that all invocations of the COMPARE macro passed successfully.
101
// Exit with a failure if at least one of the tests failed.
102
#define VERIFY_RUN() \
103
if (failure) { \
104
V8_Fatal(__FILE__, __LINE__, "ARM Disassembler tests failed.\n"); \
105
}
106
107
108
TEST
(Type0) {
109
SET_UP
();
110
111
COMPARE
(and_(
r0
,
r1
, Operand(
r2
)),
112
"e0010002 and r0, r1, r2"
);
113
COMPARE
(and_(
r1
,
r2
, Operand(
r3
),
LeaveCC
),
114
"e0021003 and r1, r2, r3"
);
115
COMPARE
(and_(
r2
,
r3
, Operand(
r4
),
SetCC
),
116
"e0132004 ands r2, r3, r4"
);
117
COMPARE
(and_(
r3
,
r4
, Operand(
r5
),
LeaveCC
,
eq
),
118
"00043005 andeq r3, r4, r5"
);
119
120
COMPARE
(eor(
r4
,
r5
, Operand(
r6
,
LSL
, 0)),
121
"e0254006 eor r4, r5, r6"
);
122
COMPARE
(eor(
r4
,
r5
, Operand(
r7
,
LSL
, 1),
SetCC
),
123
"e0354087 eors r4, r5, r7, lsl #1"
);
124
COMPARE
(eor(
r4
,
r5
, Operand(
r8
,
LSL
, 2),
LeaveCC
,
ne
),
125
"10254108 eorne r4, r5, r8, lsl #2"
);
126
COMPARE
(eor(
r4
,
r5
, Operand(
r9
,
LSL
, 3),
SetCC
,
cs
),
127
"20354189 eorcss r4, r5, r9, lsl #3"
);
128
129
COMPARE
(sub(
r5
,
r6
, Operand(
r10
,
LSL
, 31),
LeaveCC
,
hs
),
130
"20465f8a subcs r5, r6, r10, lsl #31"
);
131
COMPARE
(sub(
r5
,
r6
, Operand(
r10
,
LSL
, 30),
SetCC
,
cc
),
132
"30565f0a subccs r5, r6, r10, lsl #30"
);
133
COMPARE
(sub(
r5
,
r6
, Operand(
r10
,
LSL
, 24),
LeaveCC
,
lo
),
134
"30465c0a subcc r5, r6, r10, lsl #24"
);
135
COMPARE
(sub(
r5
,
r6
, Operand(
r10
,
LSL
, 16),
SetCC
,
mi
),
136
"4056580a submis r5, r6, r10, lsl #16"
);
137
138
COMPARE
(rsb(
r6
,
r7
, Operand(
fp
)),
139
"e067600b rsb r6, r7, fp"
);
140
COMPARE
(rsb(
r6
,
r7
, Operand(
fp
,
LSR
, 1)),
141
"e06760ab rsb r6, r7, fp, lsr #1"
);
142
COMPARE
(rsb(
r6
,
r7
, Operand(
fp
,
LSR
, 0),
SetCC
),
143
"e077602b rsbs r6, r7, fp, lsr #32"
);
144
COMPARE
(rsb(
r6
,
r7
, Operand(
fp
,
LSR
, 31),
LeaveCC
,
pl
),
145
"50676fab rsbpl r6, r7, fp, lsr #31"
);
146
147
COMPARE
(add(
r7
,
r8
, Operand(
ip
,
ASR
, 1)),
148
"e08870cc add r7, r8, ip, asr #1"
);
149
COMPARE
(add(
r7
,
r8
, Operand(
ip
,
ASR
, 0)),
150
"e088704c add r7, r8, ip, asr #32"
);
151
COMPARE
(add(
r7
,
r8
, Operand(
ip
),
SetCC
),
152
"e098700c adds r7, r8, ip"
);
153
COMPARE
(add(
r7
,
r8
, Operand(
ip
,
ASR
, 31),
SetCC
,
vs
),
154
"60987fcc addvss r7, r8, ip, asr #31"
);
155
156
COMPARE
(adc(
r7
,
fp
, Operand(
ip
,
ASR
, 5)),
157
"e0ab72cc adc r7, fp, ip, asr #5"
);
158
COMPARE
(adc(
r4
,
ip
, Operand(
ip
,
ASR
, 1),
LeaveCC
,
vc
),
159
"70ac40cc adcvc r4, ip, ip, asr #1"
);
160
COMPARE
(adc(
r5
,
sp
, Operand(
ip
),
SetCC
),
161
"e0bd500c adcs r5, sp, ip"
);
162
COMPARE
(adc(
r8
,
lr
, Operand(
ip
,
ASR
, 31),
SetCC
,
vc
),
163
"70be8fcc adcvcs r8, lr, ip, asr #31"
);
164
165
COMPARE
(sbc(
r7
,
r1
, Operand(
ip
,
ROR
, 1),
LeaveCC
,
hi
),
166
"80c170ec sbchi r7, r1, ip, ror #1"
);
167
COMPARE
(sbc(
r7
,
r9
, Operand(
ip
,
ROR
, 4)),
168
"e0c9726c sbc r7, r9, ip, ror #4"
);
169
COMPARE
(sbc(
r7
,
r10
, Operand(
ip
),
SetCC
),
170
"e0da700c sbcs r7, r10, ip"
);
171
COMPARE
(sbc(
r7
,
ip
, Operand(
ip
,
ROR
, 31),
SetCC
,
hi
),
172
"80dc7fec sbchis r7, ip, ip, ror #31"
);
173
174
COMPARE
(rsc(
r7
,
r8
, Operand(
ip
,
LSL
,
r0
)),
175
"e0e8701c rsc r7, r8, ip, lsl r0"
);
176
COMPARE
(rsc(
r7
,
r8
, Operand(
ip
,
LSL
,
r1
)),
177
"e0e8711c rsc r7, r8, ip, lsl r1"
);
178
COMPARE
(rsc(
r7
,
r8
, Operand(
ip
),
SetCC
),
179
"e0f8700c rscs r7, r8, ip"
);
180
COMPARE
(rsc(
r7
,
r8
, Operand(
ip
,
LSL
,
r3
),
SetCC
,
ls
),
181
"90f8731c rsclss r7, r8, ip, lsl r3"
);
182
183
COMPARE
(tst(
r7
, Operand(
r5
,
ASR
,
ip
),
ge
),
184
"a1170c55 tstge r7, r5, asr ip"
);
185
COMPARE
(tst(
r7
, Operand(
r6
,
ASR
,
sp
)),
186
"e1170d56 tst r7, r6, asr sp"
);
187
COMPARE
(tst(
r7
, Operand(
r7
),
ge
),
188
"a1170007 tstge r7, r7"
);
189
COMPARE
(tst(
r7
, Operand(
r8
,
ASR
,
fp
),
ge
),
190
"a1170b58 tstge r7, r8, asr fp"
);
191
192
COMPARE
(teq(
r7
, Operand(
r5
,
ROR
,
r0
),
lt
),
193
"b1370075 teqlt r7, r5, ror r0"
);
194
COMPARE
(teq(
r7
, Operand(
r6
,
ROR
,
lr
)),
195
"e1370e76 teq r7, r6, ror lr"
);
196
COMPARE
(teq(
r7
, Operand(
r7
),
lt
),
197
"b1370007 teqlt r7, r7"
);
198
COMPARE
(teq(
r7
, Operand(
r8
,
ROR
,
r1
)),
199
"e1370178 teq r7, r8, ror r1"
);
200
201
COMPARE
(cmp(
r7
, Operand(
r4
)),
202
"e1570004 cmp r7, r4"
);
203
COMPARE
(cmp(
r7
, Operand(
r6
,
LSL
, 1),
gt
),
204
"c1570086 cmpgt r7, r6, lsl #1"
);
205
COMPARE
(cmp(
r7
, Operand(
r8
,
LSR
, 3),
gt
),
206
"c15701a8 cmpgt r7, r8, lsr #3"
);
207
COMPARE
(cmp(
r7
, Operand(
r8
,
ASR
, 19)),
208
"e15709c8 cmp r7, r8, asr #19"
);
209
210
COMPARE
(cmn(
r0
, Operand(
r4
)),
211
"e1700004 cmn r0, r4"
);
212
COMPARE
(cmn(
r1
, Operand(
r6
,
ROR
, 1)),
213
"e17100e6 cmn r1, r6, ror #1"
);
214
COMPARE
(cmn(
r2
, Operand(
r8
)),
215
"e1720008 cmn r2, r8"
);
216
COMPARE
(cmn(
r3
, Operand(
fp
),
le
),
217
"d173000b cmnle r3, fp"
);
218
219
COMPARE
(orr(
r7
,
r8
, Operand(
lr
),
LeaveCC
,
al
),
220
"e188700e orr r7, r8, lr"
);
221
COMPARE
(orr(
r7
,
r8
, Operand(
fp
)),
222
"e188700b orr r7, r8, fp"
);
223
COMPARE
(orr(
r7
,
r8
, Operand(
sp
),
SetCC
),
224
"e198700d orrs r7, r8, sp"
);
225
COMPARE
(orr(
r7
,
r8
, Operand(
ip
),
SetCC
,
al
),
226
"e198700c orrs r7, r8, ip"
);
227
228
COMPARE
(mov(
r0
, Operand(
r1
),
LeaveCC
,
eq
),
229
"01a00001 moveq r0, r1"
);
230
COMPARE
(mov(
r0
, Operand(
r2
)),
231
"e1a00002 mov r0, r2"
);
232
COMPARE
(mov(
r0
, Operand(
r3
),
SetCC
),
233
"e1b00003 movs r0, r3"
);
234
COMPARE
(mov(
r0
, Operand(
r4
),
SetCC
,
pl
),
235
"51b00004 movpls r0, r4"
);
236
237
COMPARE
(bic(
r0
,
lr
, Operand(
r1
),
LeaveCC
,
vs
),
238
"61ce0001 bicvs r0, lr, r1"
);
239
COMPARE
(bic(
r0
,
r9
, Operand(
r2
),
LeaveCC
,
vc
),
240
"71c90002 bicvc r0, r9, r2"
);
241
COMPARE
(bic(
r0
,
r5
, Operand(
r3
),
SetCC
),
242
"e1d50003 bics r0, r5, r3"
);
243
COMPARE
(bic(
r0
,
r1
, Operand(
r4
),
SetCC
,
pl
),
244
"51d10004 bicpls r0, r1, r4"
);
245
246
COMPARE
(mvn(
r10
, Operand(
r1
)),
247
"e1e0a001 mvn r10, r1"
);
248
COMPARE
(mvn(
r9
, Operand(
r2
)),
249
"e1e09002 mvn r9, r2"
);
250
COMPARE
(mvn(
r0
, Operand(
r3
),
SetCC
),
251
"e1f00003 mvns r0, r3"
);
252
COMPARE
(mvn(
r5
, Operand(
r4
),
SetCC
,
cc
),
253
"31f05004 mvnccs r5, r4"
);
254
255
// Instructions autotransformed by the assembler.
256
// mov -> mvn.
257
COMPARE
(mov(
r3
, Operand(-1),
LeaveCC
,
al
),
258
"e3e03000 mvn r3, #0"
);
259
COMPARE
(mov(
r4
, Operand(-2),
SetCC
,
al
),
260
"e3f04001 mvns r4, #1"
);
261
COMPARE
(mov(
r5
, Operand(0x0ffffff0),
SetCC
,
ne
),
262
"13f052ff mvnnes r5, #-268435441"
);
263
COMPARE
(mov(
r6
, Operand(-1),
LeaveCC
,
ne
),
264
"13e06000 mvnne r6, #0"
);
265
266
// mvn -> mov.
267
COMPARE
(mvn(
r3
, Operand(-1),
LeaveCC
,
al
),
268
"e3a03000 mov r3, #0"
);
269
COMPARE
(mvn(
r4
, Operand(-2),
SetCC
,
al
),
270
"e3b04001 movs r4, #1"
);
271
COMPARE
(mvn(
r5
, Operand(0x0ffffff0),
SetCC
,
ne
),
272
"13b052ff movnes r5, #-268435441"
);
273
COMPARE
(mvn(
r6
, Operand(-1),
LeaveCC
,
ne
),
274
"13a06000 movne r6, #0"
);
275
276
// mov -> movw.
277
if
(
CpuFeatures::IsSupported
(
ARMv7
)) {
278
COMPARE
(mov(
r5
, Operand(0x01234),
LeaveCC
,
ne
),
279
"13015234 movwne r5, #4660"
);
280
// We only disassemble one instruction so the eor instruction is not here.
281
COMPARE
(eor(
r5
,
r4
, Operand(0x1234),
LeaveCC
,
ne
),
282
"1301c234 movwne ip, #4660"
);
283
// Movw can't do setcc so we don't get that here. Mov immediate with setcc
284
// is pretty strange anyway.
285
COMPARE
(mov(
r5
, Operand(0x01234),
SetCC
,
ne
),
286
"159fc000 ldrne ip, [pc, #+0]"
);
287
// Emit a literal pool now, otherwise this could be dumped later, in the
288
// middle of a different test.
289
EMIT_PENDING_LITERALS
();
290
291
// We only disassemble one instruction so the eor instruction is not here.
292
// The eor does the setcc so we get a movw here.
293
COMPARE
(eor(
r5
,
r4
, Operand(0x1234),
SetCC
,
ne
),
294
"1301c234 movwne ip, #4660"
);
295
296
COMPARE
(movt(
r5
, 0x4321,
ne
),
297
"13445321 movtne r5, #17185"
);
298
COMPARE
(movw(
r5
, 0xabcd,
eq
),
299
"030a5bcd movweq r5, #43981"
);
300
}
301
302
// Eor doesn't have an eor-negative variant, but we can do an mvn followed by
303
// an eor to get the same effect.
304
COMPARE
(eor(
r5
,
r4
, Operand(0xffffff34),
SetCC
,
ne
),
305
"13e0c0cb mvnne ip, #203"
);
306
307
// and <-> bic.
308
COMPARE
(and_(
r3
,
r5
, Operand(0xfc03ffff)),
309
"e3c537ff bic r3, r5, #66846720"
);
310
COMPARE
(bic(
r3
,
r5
, Operand(0xfc03ffff)),
311
"e20537ff and r3, r5, #66846720"
);
312
313
// sub <-> add.
314
COMPARE
(add(
r3
,
r5
, Operand(-1024)),
315
"e2453b01 sub r3, r5, #1024"
);
316
COMPARE
(sub(
r3
,
r5
, Operand(-1024)),
317
"e2853b01 add r3, r5, #1024"
);
318
319
// cmp <-> cmn.
320
COMPARE
(cmp(
r3
, Operand(-1024)),
321
"e3730b01 cmn r3, #1024"
);
322
COMPARE
(cmn(
r3
, Operand(-1024)),
323
"e3530b01 cmp r3, #1024"
);
324
325
// Miscellaneous instructions encoded as type 0.
326
COMPARE
(blx(
ip
),
327
"e12fff3c blx ip"
);
328
COMPARE
(bkpt(0),
329
"e1200070 bkpt 0"
);
330
COMPARE
(bkpt(0xffff),
331
"e12fff7f bkpt 65535"
);
332
COMPARE
(clz(
r6
,
r7
),
333
"e16f6f17 clz r6, r7"
);
334
335
VERIFY_RUN
();
336
}
337
338
339
TEST
(Type1) {
340
SET_UP
();
341
342
COMPARE
(and_(
r0
,
r1
, Operand(0x00000000)),
343
"e2010000 and r0, r1, #0"
);
344
COMPARE
(and_(
r1
,
r2
, Operand(0x00000001),
LeaveCC
),
345
"e2021001 and r1, r2, #1"
);
346
COMPARE
(and_(
r2
,
r3
, Operand(0x00000010),
SetCC
),
347
"e2132010 ands r2, r3, #16"
);
348
COMPARE
(and_(
r3
,
r4
, Operand(0x00000100),
LeaveCC
,
eq
),
349
"02043c01 andeq r3, r4, #256"
);
350
COMPARE
(and_(
r4
,
r5
, Operand(0x00001000),
SetCC
,
ne
),
351
"12154a01 andnes r4, r5, #4096"
);
352
353
COMPARE
(eor(
r4
,
r5
, Operand(0x00001000)),
354
"e2254a01 eor r4, r5, #4096"
);
355
COMPARE
(eor(
r4
,
r4
, Operand(0x00010000),
LeaveCC
),
356
"e2244801 eor r4, r4, #65536"
);
357
COMPARE
(eor(
r4
,
r3
, Operand(0x00100000),
SetCC
),
358
"e2334601 eors r4, r3, #1048576"
);
359
COMPARE
(eor(
r4
,
r2
, Operand(0x01000000),
LeaveCC
,
cs
),
360
"22224401 eorcs r4, r2, #16777216"
);
361
COMPARE
(eor(
r4
,
r1
, Operand(0x10000000),
SetCC
,
cc
),
362
"32314201 eorccs r4, r1, #268435456"
);
363
364
VERIFY_RUN
();
365
}
366
367
368
TEST
(Type3) {
369
SET_UP
();
370
371
if
(
CpuFeatures::IsSupported
(
ARMv7
)) {
372
COMPARE
(ubfx(
r0
,
r1
, 5, 10),
373
"e7e902d1 ubfx r0, r1, #5, #10"
);
374
COMPARE
(ubfx(
r1
,
r0
, 5, 10),
375
"e7e912d0 ubfx r1, r0, #5, #10"
);
376
COMPARE
(ubfx(
r0
,
r1
, 31, 1),
377
"e7e00fd1 ubfx r0, r1, #31, #1"
);
378
COMPARE
(ubfx(
r1
,
r0
, 31, 1),
379
"e7e01fd0 ubfx r1, r0, #31, #1"
);
380
381
COMPARE
(sbfx(
r0
,
r1
, 5, 10),
382
"e7a902d1 sbfx r0, r1, #5, #10"
);
383
COMPARE
(sbfx(
r1
,
r0
, 5, 10),
384
"e7a912d0 sbfx r1, r0, #5, #10"
);
385
COMPARE
(sbfx(
r0
,
r1
, 31, 1),
386
"e7a00fd1 sbfx r0, r1, #31, #1"
);
387
COMPARE
(sbfx(
r1
,
r0
, 31, 1),
388
"e7a01fd0 sbfx r1, r0, #31, #1"
);
389
390
COMPARE
(bfc(
r0
, 5, 10),
391
"e7ce029f bfc r0, #5, #10"
);
392
COMPARE
(bfc(
r1
, 5, 10),
393
"e7ce129f bfc r1, #5, #10"
);
394
COMPARE
(bfc(
r0
, 31, 1),
395
"e7df0f9f bfc r0, #31, #1"
);
396
COMPARE
(bfc(
r1
, 31, 1),
397
"e7df1f9f bfc r1, #31, #1"
);
398
399
COMPARE
(bfi(
r0
,
r1
, 5, 10),
400
"e7ce0291 bfi r0, r1, #5, #10"
);
401
COMPARE
(bfi(
r1
,
r0
, 5, 10),
402
"e7ce1290 bfi r1, r0, #5, #10"
);
403
COMPARE
(bfi(
r0
,
r1
, 31, 1),
404
"e7df0f91 bfi r0, r1, #31, #1"
);
405
COMPARE
(bfi(
r1
,
r0
, 31, 1),
406
"e7df1f90 bfi r1, r0, #31, #1"
);
407
408
COMPARE
(usat(
r0
, 1, Operand(
r1
)),
409
"e6e10011 usat r0, #1, r1"
);
410
COMPARE
(usat(
r2
, 7, Operand(
lr
)),
411
"e6e7201e usat r2, #7, lr"
);
412
COMPARE
(usat(
r3
, 31, Operand(
r4
,
LSL
, 31)),
413
"e6ff3f94 usat r3, #31, r4, lsl #31"
);
414
COMPARE
(usat(
r8
, 0, Operand(
r5
,
ASR
, 17)),
415
"e6e088d5 usat r8, #0, r5, asr #17"
);
416
}
417
418
VERIFY_RUN
();
419
}
420
421
422
423
TEST
(Vfp) {
424
SET_UP
();
425
426
if
(
CpuFeatures::IsSupported
(
VFP3
)) {
427
CpuFeatures::Scope scope(
VFP3
);
428
COMPARE
(vmov(
d0
,
d1
),
429
"eeb00b41 vmov.f64 d0, d1"
);
430
COMPARE
(vmov(
d3
,
d3
,
eq
),
431
"0eb03b43 vmov.f64eq d3, d3"
);
432
433
COMPARE
(vmov(
s0
,
s31
),
434
"eeb00a6f vmov.f32 s0, s31"
);
435
COMPARE
(vmov(
s31
,
s0
),
436
"eef0fa40 vmov.f32 s31, s0"
);
437
COMPARE
(vmov(
r0
,
s0
),
438
"ee100a10 vmov r0, s0"
);
439
COMPARE
(vmov(
r10
,
s31
),
440
"ee1faa90 vmov r10, s31"
);
441
COMPARE
(vmov(
s0
,
r0
),
442
"ee000a10 vmov s0, r0"
);
443
COMPARE
(vmov(
s31
,
r10
),
444
"ee0faa90 vmov s31, r10"
);
445
446
COMPARE
(vabs(
d0
,
d1
),
447
"eeb00bc1 vabs.f64 d0, d1"
);
448
COMPARE
(vabs(
d3
,
d4
,
mi
),
449
"4eb03bc4 vabs.f64mi d3, d4"
);
450
451
COMPARE
(vneg(
d0
,
d1
),
452
"eeb10b41 vneg.f64 d0, d1"
);
453
COMPARE
(vneg(
d3
,
d4
,
mi
),
454
"4eb13b44 vneg.f64mi d3, d4"
);
455
456
COMPARE
(vadd(
d0
,
d1
,
d2
),
457
"ee310b02 vadd.f64 d0, d1, d2"
);
458
COMPARE
(vadd(
d3
,
d4
,
d5
,
mi
),
459
"4e343b05 vadd.f64mi d3, d4, d5"
);
460
461
COMPARE
(vsub(
d0
,
d1
,
d2
),
462
"ee310b42 vsub.f64 d0, d1, d2"
);
463
COMPARE
(vsub(
d3
,
d4
,
d5
,
ne
),
464
"1e343b45 vsub.f64ne d3, d4, d5"
);
465
466
COMPARE
(vmul(
d2
,
d1
,
d0
),
467
"ee212b00 vmul.f64 d2, d1, d0"
);
468
COMPARE
(vmul(
d6
,
d4
,
d5
,
cc
),
469
"3e246b05 vmul.f64cc d6, d4, d5"
);
470
471
COMPARE
(vdiv(
d2
,
d2
,
d2
),
472
"ee822b02 vdiv.f64 d2, d2, d2"
);
473
COMPARE
(vdiv(
d6
,
d7
,
d7
,
hi
),
474
"8e876b07 vdiv.f64hi d6, d7, d7"
);
475
476
COMPARE
(vsqrt(
d0
,
d0
),
477
"eeb10bc0 vsqrt.f64 d0, d0"
);
478
COMPARE
(vsqrt(
d2
,
d3
,
ne
),
479
"1eb12bc3 vsqrt.f64ne d2, d3"
);
480
481
COMPARE
(vmov(
d0
, 1.0),
482
"eeb70b00 vmov.f64 d0, #1"
);
483
COMPARE
(vmov(
d2
, -13.0),
484
"eeba2b0a vmov.f64 d2, #-13"
);
485
486
COMPARE
(vldr(
s0
,
r0
, 0),
487
"ed900a00 vldr s0, [r0 + 4*0]"
);
488
COMPARE
(vldr(
s1
,
r1
, 4),
489
"edd10a01 vldr s1, [r1 + 4*1]"
);
490
COMPARE
(vldr(
s15
,
r4
, 16),
491
"edd47a04 vldr s15, [r4 + 4*4]"
);
492
COMPARE
(vldr(
s16
,
r5
, 20),
493
"ed958a05 vldr s16, [r5 + 4*5]"
);
494
COMPARE
(vldr(
s31
,
r10
, 1020),
495
"eddafaff vldr s31, [r10 + 4*255]"
);
496
497
COMPARE
(vstr(
s0
,
r0
, 0),
498
"ed800a00 vstr s0, [r0 + 4*0]"
);
499
COMPARE
(vstr(
s1
,
r1
, 4),
500
"edc10a01 vstr s1, [r1 + 4*1]"
);
501
COMPARE
(vstr(
s15
,
r8
, 8),
502
"edc87a02 vstr s15, [r8 + 4*2]"
);
503
COMPARE
(vstr(
s16
,
r9
, 12),
504
"ed898a03 vstr s16, [r9 + 4*3]"
);
505
COMPARE
(vstr(
s31
,
r10
, 1020),
506
"edcafaff vstr s31, [r10 + 4*255]"
);
507
508
COMPARE
(vldr(
d0
,
r0
, 0),
509
"ed900b00 vldr d0, [r0 + 4*0]"
);
510
COMPARE
(vldr(
d1
,
r1
, 4),
511
"ed911b01 vldr d1, [r1 + 4*1]"
);
512
COMPARE
(vldr(
d15
,
r10
, 1020),
513
"ed9afbff vldr d15, [r10 + 4*255]"
);
514
COMPARE
(vstr(
d0
,
r0
, 0),
515
"ed800b00 vstr d0, [r0 + 4*0]"
);
516
COMPARE
(vstr(
d1
,
r1
, 4),
517
"ed811b01 vstr d1, [r1 + 4*1]"
);
518
COMPARE
(vstr(
d15
,
r10
, 1020),
519
"ed8afbff vstr d15, [r10 + 4*255]"
);
520
521
COMPARE
(vmsr(
r5
),
522
"eee15a10 vmsr FPSCR, r5"
);
523
COMPARE
(vmsr(
r10
,
pl
),
524
"5ee1aa10 vmsrpl FPSCR, r10"
);
525
COMPARE
(vmsr(
pc
),
526
"eee1fa10 vmsr FPSCR, APSR"
);
527
COMPARE
(vmrs(
r5
),
528
"eef15a10 vmrs r5, FPSCR"
);
529
COMPARE
(vmrs(
r10
,
ge
),
530
"aef1aa10 vmrsge r10, FPSCR"
);
531
COMPARE
(vmrs(
pc
),
532
"eef1fa10 vmrs APSR, FPSCR"
);
533
534
COMPARE
(vstm(
ia
,
r0
,
d1
,
d3
),
535
"ec801b06 vstmia r0, {d1-d3}"
);
536
COMPARE
(vldm(
ia
,
r1
,
d2
,
d5
),
537
"ec912b08 vldmia r1, {d2-d5}"
);
538
COMPARE
(vstm(
ia
,
r2
,
d0
,
d15
),
539
"ec820b20 vstmia r2, {d0-d15}"
);
540
COMPARE
(vldm(
ia
,
r3
,
d0
,
d15
),
541
"ec930b20 vldmia r3, {d0-d15}"
);
542
COMPARE
(vstm(
ia
,
r4
,
s1
,
s3
),
543
"ecc40a03 vstmia r4, {s1-s3}"
);
544
COMPARE
(vldm(
ia
,
r5
,
s2
,
s5
),
545
"ec951a04 vldmia r5, {s2-s5}"
);
546
COMPARE
(vstm(
ia
,
r6
,
s0
,
s31
),
547
"ec860a20 vstmia r6, {s0-s31}"
);
548
COMPARE
(vldm(
ia
,
r7
,
s0
,
s31
),
549
"ec970a20 vldmia r7, {s0-s31}"
);
550
}
551
552
VERIFY_RUN
();
553
}
554
555
556
TEST
(LoadStore) {
557
SET_UP
();
558
559
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
)),
560
"e5d10000 ldrb r0, [r1, #+0]"
);
561
COMPARE
(ldrb(
r2
,
MemOperand
(
r3
, 42)),
562
"e5d3202a ldrb r2, [r3, #+42]"
);
563
COMPARE
(ldrb(
r4
,
MemOperand
(
r5
, -42)),
564
"e555402a ldrb r4, [r5, #-42]"
);
565
COMPARE
(ldrb(
r6
,
MemOperand
(
r7
, 42,
PostIndex
)),
566
"e4d7602a ldrb r6, [r7], #+42"
);
567
COMPARE
(ldrb(
r8
,
MemOperand
(
r9
, -42,
PostIndex
)),
568
"e459802a ldrb r8, [r9], #-42"
);
569
COMPARE
(ldrb(
r10
,
MemOperand
(
fp
, 42,
PreIndex
)),
570
"e5fba02a ldrb r10, [fp, #+42]!"
);
571
COMPARE
(ldrb(
ip
,
MemOperand
(
sp
, -42,
PreIndex
)),
572
"e57dc02a ldrb ip, [sp, #-42]!"
);
573
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
,
r2
)),
574
"e7d10002 ldrb r0, [r1, +r2]"
);
575
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
,
r2
,
NegOffset
)),
576
"e7510002 ldrb r0, [r1, -r2]"
);
577
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
,
r2
,
PostIndex
)),
578
"e6d10002 ldrb r0, [r1], +r2"
);
579
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
,
r2
,
NegPostIndex
)),
580
"e6510002 ldrb r0, [r1], -r2"
);
581
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
,
r2
,
PreIndex
)),
582
"e7f10002 ldrb r0, [r1, +r2]!"
);
583
COMPARE
(ldrb(
r0
,
MemOperand
(
r1
,
r2
,
NegPreIndex
)),
584
"e7710002 ldrb r0, [r1, -r2]!"
);
585
586
COMPARE
(strb(
r0
,
MemOperand
(
r1
)),
587
"e5c10000 strb r0, [r1, #+0]"
);
588
COMPARE
(strb(
r2
,
MemOperand
(
r3
, 42)),
589
"e5c3202a strb r2, [r3, #+42]"
);
590
COMPARE
(strb(
r4
,
MemOperand
(
r5
, -42)),
591
"e545402a strb r4, [r5, #-42]"
);
592
COMPARE
(strb(
r6
,
MemOperand
(
r7
, 42,
PostIndex
)),
593
"e4c7602a strb r6, [r7], #+42"
);
594
COMPARE
(strb(
r8
,
MemOperand
(
r9
, -42,
PostIndex
)),
595
"e449802a strb r8, [r9], #-42"
);
596
COMPARE
(strb(
r10
,
MemOperand
(
fp
, 42,
PreIndex
)),
597
"e5eba02a strb r10, [fp, #+42]!"
);
598
COMPARE
(strb(
ip
,
MemOperand
(
sp
, -42,
PreIndex
)),
599
"e56dc02a strb ip, [sp, #-42]!"
);
600
COMPARE
(strb(
r0
,
MemOperand
(
r1
,
r2
)),
601
"e7c10002 strb r0, [r1, +r2]"
);
602
COMPARE
(strb(
r0
,
MemOperand
(
r1
,
r2
,
NegOffset
)),
603
"e7410002 strb r0, [r1, -r2]"
);
604
COMPARE
(strb(
r0
,
MemOperand
(
r1
,
r2
,
PostIndex
)),
605
"e6c10002 strb r0, [r1], +r2"
);
606
COMPARE
(strb(
r0
,
MemOperand
(
r1
,
r2
,
NegPostIndex
)),
607
"e6410002 strb r0, [r1], -r2"
);
608
COMPARE
(strb(
r0
,
MemOperand
(
r1
,
r2
,
PreIndex
)),
609
"e7e10002 strb r0, [r1, +r2]!"
);
610
COMPARE
(strb(
r0
,
MemOperand
(
r1
,
r2
,
NegPreIndex
)),
611
"e7610002 strb r0, [r1, -r2]!"
);
612
613
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
)),
614
"e1d100b0 ldrh r0, [r1, #+0]"
);
615
COMPARE
(ldrh(
r2
,
MemOperand
(
r3
, 42)),
616
"e1d322ba ldrh r2, [r3, #+42]"
);
617
COMPARE
(ldrh(
r4
,
MemOperand
(
r5
, -42)),
618
"e15542ba ldrh r4, [r5, #-42]"
);
619
COMPARE
(ldrh(
r6
,
MemOperand
(
r7
, 42,
PostIndex
)),
620
"e0d762ba ldrh r6, [r7], #+42"
);
621
COMPARE
(ldrh(
r8
,
MemOperand
(
r9
, -42,
PostIndex
)),
622
"e05982ba ldrh r8, [r9], #-42"
);
623
COMPARE
(ldrh(
r10
,
MemOperand
(
fp
, 42,
PreIndex
)),
624
"e1fba2ba ldrh r10, [fp, #+42]!"
);
625
COMPARE
(ldrh(
ip
,
MemOperand
(
sp
, -42,
PreIndex
)),
626
"e17dc2ba ldrh ip, [sp, #-42]!"
);
627
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
,
r2
)),
628
"e19100b2 ldrh r0, [r1, +r2]"
);
629
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
,
r2
,
NegOffset
)),
630
"e11100b2 ldrh r0, [r1, -r2]"
);
631
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
,
r2
,
PostIndex
)),
632
"e09100b2 ldrh r0, [r1], +r2"
);
633
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
,
r2
,
NegPostIndex
)),
634
"e01100b2 ldrh r0, [r1], -r2"
);
635
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
,
r2
,
PreIndex
)),
636
"e1b100b2 ldrh r0, [r1, +r2]!"
);
637
COMPARE
(ldrh(
r0
,
MemOperand
(
r1
,
r2
,
NegPreIndex
)),
638
"e13100b2 ldrh r0, [r1, -r2]!"
);
639
640
COMPARE
(strh(
r0
,
MemOperand
(
r1
)),
641
"e1c100b0 strh r0, [r1, #+0]"
);
642
COMPARE
(strh(
r2
,
MemOperand
(
r3
, 42)),
643
"e1c322ba strh r2, [r3, #+42]"
);
644
COMPARE
(strh(
r4
,
MemOperand
(
r5
, -42)),
645
"e14542ba strh r4, [r5, #-42]"
);
646
COMPARE
(strh(
r6
,
MemOperand
(
r7
, 42,
PostIndex
)),
647
"e0c762ba strh r6, [r7], #+42"
);
648
COMPARE
(strh(
r8
,
MemOperand
(
r9
, -42,
PostIndex
)),
649
"e04982ba strh r8, [r9], #-42"
);
650
COMPARE
(strh(
r10
,
MemOperand
(
fp
, 42,
PreIndex
)),
651
"e1eba2ba strh r10, [fp, #+42]!"
);
652
COMPARE
(strh(
ip
,
MemOperand
(
sp
, -42,
PreIndex
)),
653
"e16dc2ba strh ip, [sp, #-42]!"
);
654
COMPARE
(strh(
r0
,
MemOperand
(
r1
,
r2
)),
655
"e18100b2 strh r0, [r1, +r2]"
);
656
COMPARE
(strh(
r0
,
MemOperand
(
r1
,
r2
,
NegOffset
)),
657
"e10100b2 strh r0, [r1, -r2]"
);
658
COMPARE
(strh(
r0
,
MemOperand
(
r1
,
r2
,
PostIndex
)),
659
"e08100b2 strh r0, [r1], +r2"
);
660
COMPARE
(strh(
r0
,
MemOperand
(
r1
,
r2
,
NegPostIndex
)),
661
"e00100b2 strh r0, [r1], -r2"
);
662
COMPARE
(strh(
r0
,
MemOperand
(
r1
,
r2
,
PreIndex
)),
663
"e1a100b2 strh r0, [r1, +r2]!"
);
664
COMPARE
(strh(
r0
,
MemOperand
(
r1
,
r2
,
NegPreIndex
)),
665
"e12100b2 strh r0, [r1, -r2]!"
);
666
667
COMPARE
(ldr(
r0
,
MemOperand
(
r1
)),
668
"e5910000 ldr r0, [r1, #+0]"
);
669
COMPARE
(ldr(
r2
,
MemOperand
(
r3
, 42)),
670
"e593202a ldr r2, [r3, #+42]"
);
671
COMPARE
(ldr(
r4
,
MemOperand
(
r5
, -42)),
672
"e515402a ldr r4, [r5, #-42]"
);
673
COMPARE
(ldr(
r6
,
MemOperand
(
r7
, 42,
PostIndex
)),
674
"e497602a ldr r6, [r7], #+42"
);
675
COMPARE
(ldr(
r8
,
MemOperand
(
r9
, -42,
PostIndex
)),
676
"e419802a ldr r8, [r9], #-42"
);
677
COMPARE
(ldr(
r10
,
MemOperand
(
fp
, 42,
PreIndex
)),
678
"e5bba02a ldr r10, [fp, #+42]!"
);
679
COMPARE
(ldr(
ip
,
MemOperand
(
sp
, -42,
PreIndex
)),
680
"e53dc02a ldr ip, [sp, #-42]!"
);
681
COMPARE
(ldr(
r0
,
MemOperand
(
r1
,
r2
)),
682
"e7910002 ldr r0, [r1, +r2]"
);
683
COMPARE
(ldr(
r0
,
MemOperand
(
r1
,
r2
,
NegOffset
)),
684
"e7110002 ldr r0, [r1, -r2]"
);
685
COMPARE
(ldr(
r0
,
MemOperand
(
r1
,
r2
,
PostIndex
)),
686
"e6910002 ldr r0, [r1], +r2"
);
687
COMPARE
(ldr(
r0
,
MemOperand
(
r1
,
r2
,
NegPostIndex
)),
688
"e6110002 ldr r0, [r1], -r2"
);
689
COMPARE
(ldr(
r0
,
MemOperand
(
r1
,
r2
,
PreIndex
)),
690
"e7b10002 ldr r0, [r1, +r2]!"
);
691
COMPARE
(ldr(
r0
,
MemOperand
(
r1
,
r2
,
NegPreIndex
)),
692
"e7310002 ldr r0, [r1, -r2]!"
);
693
694
COMPARE
(str(
r0
,
MemOperand
(
r1
)),
695
"e5810000 str r0, [r1, #+0]"
);
696
COMPARE
(str(
r2
,
MemOperand
(
r3
, 42)),
697
"e583202a str r2, [r3, #+42]"
);
698
COMPARE
(str(
r4
,
MemOperand
(
r5
, -42)),
699
"e505402a str r4, [r5, #-42]"
);
700
COMPARE
(str(
r6
,
MemOperand
(
r7
, 42,
PostIndex
)),
701
"e487602a str r6, [r7], #+42"
);
702
COMPARE
(str(
r8
,
MemOperand
(
r9
, -42,
PostIndex
)),
703
"e409802a str r8, [r9], #-42"
);
704
COMPARE
(str(
r10
,
MemOperand
(
fp
, 42,
PreIndex
)),
705
"e5aba02a str r10, [fp, #+42]!"
);
706
COMPARE
(str(
ip
,
MemOperand
(
sp
, -42,
PreIndex
)),
707
"e52dc02a str ip, [sp, #-42]!"
);
708
COMPARE
(str(
r0
,
MemOperand
(
r1
,
r2
)),
709
"e7810002 str r0, [r1, +r2]"
);
710
COMPARE
(str(
r0
,
MemOperand
(
r1
,
r2
,
NegOffset
)),
711
"e7010002 str r0, [r1, -r2]"
);
712
COMPARE
(str(
r0
,
MemOperand
(
r1
,
r2
,
PostIndex
)),
713
"e6810002 str r0, [r1], +r2"
);
714
COMPARE
(str(
r0
,
MemOperand
(
r1
,
r2
,
NegPostIndex
)),
715
"e6010002 str r0, [r1], -r2"
);
716
COMPARE
(str(
r0
,
MemOperand
(
r1
,
r2
,
PreIndex
)),
717
"e7a10002 str r0, [r1, +r2]!"
);
718
COMPARE
(str(
r0
,
MemOperand
(
r1
,
r2
,
NegPreIndex
)),
719
"e7210002 str r0, [r1, -r2]!"
);
720
721
if
(
CpuFeatures::IsSupported
(
ARMv7
)) {
722
CpuFeatures::Scope scope(
ARMv7
);
723
COMPARE
(ldrd(
r0
,
r1
,
MemOperand
(
r1
)),
724
"e1c100d0 ldrd r0, [r1, #+0]"
);
725
COMPARE
(ldrd(
r2
,
r3
,
MemOperand
(
r3
, 127)),
726
"e1c327df ldrd r2, [r3, #+127]"
);
727
COMPARE
(ldrd(
r4
,
r5
,
MemOperand
(
r5
, -127)),
728
"e14547df ldrd r4, [r5, #-127]"
);
729
COMPARE
(ldrd(
r6
,
r7
,
MemOperand
(
r7
, 127,
PostIndex
)),
730
"e0c767df ldrd r6, [r7], #+127"
);
731
COMPARE
(ldrd(
r8
,
r9
,
MemOperand
(
r9
, -127,
PostIndex
)),
732
"e04987df ldrd r8, [r9], #-127"
);
733
COMPARE
(ldrd(
r10
,
fp
,
MemOperand
(
fp
, 127,
PreIndex
)),
734
"e1eba7df ldrd r10, [fp, #+127]!"
);
735
COMPARE
(ldrd(
ip
,
sp
,
MemOperand
(
sp
, -127,
PreIndex
)),
736
"e16dc7df ldrd ip, [sp, #-127]!"
);
737
738
COMPARE
(strd(
r0
,
r1
,
MemOperand
(
r1
)),
739
"e1c100f0 strd r0, [r1, #+0]"
);
740
COMPARE
(strd(
r2
,
r3
,
MemOperand
(
r3
, 127)),
741
"e1c327ff strd r2, [r3, #+127]"
);
742
COMPARE
(strd(
r4
,
r5
,
MemOperand
(
r5
, -127)),
743
"e14547ff strd r4, [r5, #-127]"
);
744
COMPARE
(strd(
r6
,
r7
,
MemOperand
(
r7
, 127,
PostIndex
)),
745
"e0c767ff strd r6, [r7], #+127"
);
746
COMPARE
(strd(
r8
,
r9
,
MemOperand
(
r9
, -127,
PostIndex
)),
747
"e04987ff strd r8, [r9], #-127"
);
748
COMPARE
(strd(
r10
,
fp
,
MemOperand
(
fp
, 127,
PreIndex
)),
749
"e1eba7ff strd r10, [fp, #+127]!"
);
750
COMPARE
(strd(
ip
,
sp
,
MemOperand
(
sp
, -127,
PreIndex
)),
751
"e16dc7ff strd ip, [sp, #-127]!"
);
752
}
753
754
VERIFY_RUN
();
755
}
756
v8::internal::lo
Definition:
constants-arm.h:140
v8::internal::s2
const SwVfpRegister s2
Definition:
assembler-arm.h:277
EMIT_PENDING_LITERALS
#define EMIT_PENDING_LITERALS()
Definition:
test-disasm-arm.cc:96
COMPARE
#define COMPARE(asm_, compare_string)
Definition:
test-disasm-arm.cc:87
v8::internal::r3
const Register r3
Definition:
assembler-arm.h:151
v8::internal::gt
Definition:
constants-arm.h:131
v8::internal::TEST
Definition:
natives.h:39
v8::internal::NegPreIndex
Definition:
constants-arm.h:321
debug.h
v8::internal::ge
Definition:
constants-arm.h:129
v8::internal::d5
const DwVfpRegister d5
Definition:
assembler-arm.h:314
v8::internal::d0
const DwVfpRegister d0
Definition:
assembler-arm.h:309
v8::internal::s16
const SwVfpRegister s16
Definition:
assembler-arm.h:291
v8::internal::r6
const Register r6
Definition:
assembler-arm.h:154
v8::internal::cs
Definition:
constants-arm.h:121
disasm.h
v8::internal::CpuFeatures::IsSupported
static bool IsSupported(CpuFeature f)
Definition:
assembler-arm.h:510
VERIFY_RUN
#define VERIFY_RUN()
Definition:
test-disasm-arm.cc:102
v8::internal::vs
Definition:
constants-arm.h:125
v8::internal::d6
const DwVfpRegister d6
Definition:
assembler-arm.h:315
v8::internal::eq
Definition:
constants-arm.h:119
v8::internal::ROR
Definition:
constants-arm.h:287
disasm::NameConverter
Definition:
disasm.h:38
v8::internal::r2
const Register r2
Definition:
assembler-arm.h:150
cctest.h
v8::internal::ARMv7
Definition:
v8globals.h:433
v8::internal::s31
const SwVfpRegister s31
Definition:
assembler-arm.h:306
v8::internal::byte
uint8_t byte
Definition:
globals.h:156
v8::internal::ne
Definition:
constants-arm.h:120
v8::internal::pl
Definition:
constants-arm.h:124
v8::internal::vc
Definition:
constants-arm.h:126
v8::internal::sp
const Register sp
Definition:
assembler-arm.h:164
v8::internal::s3
const SwVfpRegister s3
Definition:
assembler-arm.h:278
v8::internal::Vector::start
T * start() const
Definition:
utils.h:390
v8::internal::SetCC
Definition:
constants-arm.h:270
serialize.h
disasm::Disassembler::InstructionDecode
int InstructionDecode(v8::internal::Vector< char > buffer, byte *instruction)
v8::internal::LeaveCC
Definition:
constants-arm.h:271
v8::internal::ip
const Register ip
Definition:
assembler-arm.h:163
v8::internal::r9
const Register r9
Definition:
assembler-arm.h:159
v8::internal::d7
const DwVfpRegister d7
Definition:
assembler-arm.h:316
v8::internal::ls
Definition:
constants-arm.h:128
v8::internal::le
Definition:
constants-arm.h:132
v8::internal::pc
const Register pc
Definition:
assembler-arm.h:166
v8::internal::EmbeddedVector< char, 128 >
v8::internal::s0
const SwVfpRegister s0
Definition:
assembler-arm.h:275
v8::internal::ia
Definition:
constants-arm.h:330
v8::internal::d3
const DwVfpRegister d3
Definition:
assembler-arm.h:312
v8::internal::r0
const Register r0
Definition:
assembler-arm.h:148
SET_UP
#define SET_UP()
Definition:
test-disasm-arm.cc:75
v8::internal::s5
const SwVfpRegister s5
Definition:
assembler-arm.h:280
v8::internal::cc
Definition:
constants-arm.h:122
v8::internal::s1
const SwVfpRegister s1
Definition:
assembler-arm.h:276
v8::internal::NegOffset
Definition:
constants-arm.h:320
v8::internal::lr
const Register lr
Definition:
assembler-arm.h:165
v8::internal::LSL
Definition:
constants-arm.h:284
v8::internal::r1
const Register r1
Definition:
assembler-arm.h:149
disassembler.h
v8::internal::al
Definition:
constants-arm.h:133
macro-assembler.h
v8::internal::MemOperand
Operand MemOperand
Definition:
macro-assembler-ia32.h:52
v8::internal::r8
const Register r8
Definition:
assembler-arm.h:157
v8::Persistent< v8::Context >
v8::internal::hi
Definition:
constants-arm.h:127
v8::internal::d2
const DwVfpRegister d2
Definition:
assembler-arm.h:311
v8::internal::PreIndex
Definition:
constants-arm.h:318
v8::internal::ASR
Definition:
constants-arm.h:286
v8::internal::mi
Definition:
constants-arm.h:123
v8::Handle::IsEmpty
bool IsEmpty() const
Definition:
v8.h:209
DisassembleAndCompare
bool DisassembleAndCompare(byte *pc, const char *compare_string)
Definition:
test-disasm-arm.cc:52
v8::Context::New
static Persistent< Context > New(ExtensionConfiguration *extensions=NULL, Handle< ObjectTemplate > global_template=Handle< ObjectTemplate >(), Handle< Value > global_object=Handle< Value >())
Definition:
api.cc:4411
v8::internal::r10
const Register r10
Definition:
assembler-arm.h:161
v8::internal::d1
const DwVfpRegister d1
Definition:
assembler-arm.h:310
v8::internal::fp
const Register fp
Definition:
assembler-arm.h:162
v8::internal::LSR
Definition:
constants-arm.h:285
v8::internal::hs
Definition:
constants-arm.h:139
v8::internal::lt
Definition:
constants-arm.h:130
disasm::Disassembler
Definition:
disasm.h:54
v8::internal::s15
const SwVfpRegister s15
Definition:
assembler-arm.h:290
v8::internal::PostIndex
Definition:
constants-arm.h:319
v8::internal::r5
const Register r5
Definition:
assembler-arm.h:153
v8::internal::d15
const DwVfpRegister d15
Definition:
assembler-arm.h:324
v8::internal::VFP3
Definition:
v8globals.h:432
v8::internal::d4
const DwVfpRegister d4
Definition:
assembler-arm.h:313
v8::internal::NegPostIndex
Definition:
constants-arm.h:322
v8::internal::r4
const Register r4
Definition:
assembler-arm.h:152
v8::internal::r7
const Register r7
Definition:
assembler-arm.h:155
test
cctest
test-disasm-arm.cc
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