36 LGapResolver::LGapResolver(LCodeGen* owner)
38 moves_(32, owner->zone()),
41 saved_destination_(
NULL) {}
44 void LGapResolver::Resolve(LParallelMove* parallel_move) {
47 BuildInitialMoveList(parallel_move);
49 for (
int i = 0; i < moves_.length(); ++i) {
50 LMoveOperands move = moves_[i];
54 if (!move.IsEliminated() && !move.source()->IsConstantOperand()) {
64 for (
int i = 0; i < moves_.length(); ++i) {
65 if (!moves_[i].IsEliminated()) {
66 ASSERT(moves_[i].source()->IsConstantOperand());
75 void LGapResolver::BuildInitialMoveList(LParallelMove* parallel_move) {
80 const ZoneList<LMoveOperands>* moves = parallel_move->move_operands();
81 for (
int i = 0; i < moves->length(); ++i) {
82 LMoveOperands move = moves->at(i);
83 if (!move.IsRedundant()) moves_.Add(move, cgen_->zone());
89 void LGapResolver::PerformMove(
int index) {
104 ASSERT(!moves_[index].IsPending());
105 ASSERT(!moves_[index].IsRedundant());
111 LOperand* destination = moves_[index].destination();
112 moves_[index].set_destination(
NULL);
118 for (
int i = 0; i < moves_.length(); ++i) {
119 LMoveOperands other_move = moves_[i];
120 if (other_move.Blocks(destination) && !other_move.IsPending()) {
130 moves_[index].set_destination(destination);
135 LMoveOperands other_move = moves_[root_index_];
136 if (other_move.Blocks(destination)) {
137 ASSERT(other_move.IsPending());
147 void LGapResolver::Verify() {
148 #ifdef ENABLE_SLOW_ASSERTS
150 for (
int i = 0; i < moves_.length(); ++i) {
151 LOperand* destination = moves_[i].destination();
152 for (
int j = i + 1; j < moves_.length(); ++j) {
153 SLOW_ASSERT(!destination->Equals(moves_[j].destination()));
159 #define __ ACCESS_MASM(cgen_->masm())
161 void LGapResolver::BreakCycle(
int index) {
165 ASSERT(moves_[index].destination()->Equals(moves_[root_index_].source()));
168 LOperand* source = moves_[index].source();
169 saved_destination_ = moves_[index].destination();
170 if (source->IsRegister()) {
171 __ mov(kLithiumScratchReg, cgen_->ToRegister(source));
172 }
else if (source->IsStackSlot()) {
173 __ lw(kLithiumScratchReg, cgen_->ToMemOperand(source));
174 }
else if (source->IsDoubleRegister()) {
175 __ mov_d(kLithiumScratchDouble, cgen_->ToDoubleRegister(source));
176 }
else if (source->IsDoubleStackSlot()) {
177 __ ldc1(kLithiumScratchDouble, cgen_->ToMemOperand(source));
182 moves_[index].Eliminate();
186 void LGapResolver::RestoreValue() {
191 if (saved_destination_->IsRegister()) {
192 __ mov(cgen_->ToRegister(saved_destination_), kLithiumScratchReg);
193 }
else if (saved_destination_->IsStackSlot()) {
194 __ sw(kLithiumScratchReg, cgen_->ToMemOperand(saved_destination_));
195 }
else if (saved_destination_->IsDoubleRegister()) {
196 __ mov_d(cgen_->ToDoubleRegister(saved_destination_),
197 kLithiumScratchDouble);
198 }
else if (saved_destination_->IsDoubleStackSlot()) {
199 __ sdc1(kLithiumScratchDouble,
200 cgen_->ToMemOperand(saved_destination_));
206 saved_destination_ =
NULL;
210 void LGapResolver::EmitMove(
int index) {
211 LOperand* source = moves_[index].source();
212 LOperand* destination = moves_[index].destination();
217 if (source->IsRegister()) {
218 Register source_register = cgen_->ToRegister(source);
219 if (destination->IsRegister()) {
220 __ mov(cgen_->ToRegister(destination), source_register);
222 ASSERT(destination->IsStackSlot());
223 __ sw(source_register, cgen_->ToMemOperand(destination));
226 }
else if (source->IsStackSlot()) {
227 MemOperand source_operand = cgen_->ToMemOperand(source);
228 if (destination->IsRegister()) {
229 __ lw(cgen_->ToRegister(destination), source_operand);
231 ASSERT(destination->IsStackSlot());
232 MemOperand destination_operand = cgen_->ToMemOperand(destination);
234 if (!destination_operand.OffsetIsInt16Encodable()) {
239 __ lwc1(kLithiumScratchDouble, source_operand);
240 __ swc1(kLithiumScratchDouble, destination_operand);
242 __ lw(at, source_operand);
243 __ sw(at, destination_operand);
246 __ lw(kLithiumScratchReg, source_operand);
247 __ sw(kLithiumScratchReg, destination_operand);
251 }
else if (source->IsConstantOperand()) {
253 if (destination->IsRegister()) {
254 Register dst = cgen_->ToRegister(destination);
255 if (cgen_->IsInteger32(constant_source)) {
256 __ li(dst, Operand(cgen_->ToInteger32(constant_source)));
258 __ LoadObject(dst, cgen_->ToHandle(constant_source));
261 ASSERT(destination->IsStackSlot());
263 if (cgen_->IsInteger32(constant_source)) {
264 __ li(kLithiumScratchReg,
265 Operand(cgen_->ToInteger32(constant_source)));
267 __ LoadObject(kLithiumScratchReg,
268 cgen_->ToHandle(constant_source));
270 __ sw(kLithiumScratchReg, cgen_->ToMemOperand(destination));
273 }
else if (source->IsDoubleRegister()) {
275 if (destination->IsDoubleRegister()) {
276 __ mov_d(cgen_->ToDoubleRegister(destination), source_register);
278 ASSERT(destination->IsDoubleStackSlot());
279 MemOperand destination_operand = cgen_->ToMemOperand(destination);
280 __ sdc1(source_register, destination_operand);
283 }
else if (source->IsDoubleStackSlot()) {
284 MemOperand source_operand = cgen_->ToMemOperand(source);
285 if (destination->IsDoubleRegister()) {
286 __ ldc1(cgen_->ToDoubleRegister(destination), source_operand);
288 ASSERT(destination->IsDoubleStackSlot());
289 MemOperand destination_operand = cgen_->ToMemOperand(destination);
294 cgen_->ToHighMemOperand(source);
296 cgen_->ToHighMemOperand(destination);
297 __ lw(kLithiumScratchReg, source_operand);
298 __ sw(kLithiumScratchReg, destination_operand);
299 __ lw(kLithiumScratchReg, source_high_operand);
300 __ sw(kLithiumScratchReg, destination_high_operand);
302 __ ldc1(kLithiumScratchDouble, source_operand);
303 __ sdc1(kLithiumScratchDouble, destination_operand);
310 moves_[index].Eliminate();
#define SLOW_ASSERT(condition)
#define ASSERT(condition)
DwVfpRegister DoubleRegister
static LConstantOperand * cast(LOperand *op)
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination trace on stack replacement optimize closures functions with arguments object optimize functions containing for in loops profiler considers IC stability primitive functions trigger their own optimization re try self optimization if it failed insert an interrupt check at function exit execution budget before interrupt is triggered call count before self optimization self_optimization count_based_interrupts weighted_back_edges trace_opt emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 enable use of ARMv7 instructions if enable use of MIPS FPU instructions if NULL