44 switch (unalloc->
policy()) {
48 const char* register_name =
50 stream->
Add(
"(=%s)", register_name);
54 const char* double_register_name =
56 stream->
Add(
"(=%s)", double_register_name);
77 stream->
Add(
"[constant:%d]",
index());
83 stream->
Add(
"[double_stack:%d]",
index());
97 #define DEFINE_OPERAND_CACHE(name, type) \
98 L##name* L##name::cache = NULL; \
100 void L##name::SetUpCache() { \
102 cache = new L##name[kNumCachedOperands]; \
103 for (int i = 0; i < kNumCachedOperands; i++) { \
104 cache[i].ConvertTo(type, i); \
108 void L##name::TearDownCache() { \
113 #undef DEFINE_OPERAND_CACHE
116 #define LITHIUM_OPERAND_SETUP(name, type) L##name::SetUpCache();
118 #undef LITHIUM_OPERAND_SETUP
123 #define LITHIUM_OPERAND_TEARDOWN(name, type) L##name::TearDownCache();
125 #undef LITHIUM_OPERAND_TEARDOWN
130 for (
int i = 0; i < move_operands_.length(); ++i) {
131 if (!move_operands_[i].
IsRedundant())
return false;
139 for (
int i = 0; i < move_operands_.length(); ++i) {
140 if (!move_operands_[i].IsEliminated()) {
141 LOperand* source = move_operands_[i].source();
142 LOperand* destination = move_operands_[i].destination();
143 if (!first) stream->
Add(
" ");
145 if (source->
Equals(destination)) {
162 for (
int i = 0; i < values_.length(); ++i) {
163 if (i != 0) stream->
Add(
";");
164 if (values_[i] ==
NULL) {
165 stream->
Add(
"[hole]");
167 values_[i]->PrintTo(stream);
176 if (op->IsStackSlot() && op->
index() < 0)
return;
177 ASSERT(!op->IsDoubleRegister() && !op->IsDoubleStackSlot());
178 pointer_operands_.Add(op, zone);
184 if (op->IsStackSlot() && op->
index() < 0)
return;
185 ASSERT(!op->IsDoubleRegister() && !op->IsDoubleStackSlot());
186 for (
int i = 0; i < pointer_operands_.length(); ++i) {
187 if (pointer_operands_[i]->Equals(op)) {
188 pointer_operands_.Remove(i);
197 if (op->IsStackSlot() && op->
index() < 0)
return;
198 ASSERT(!op->IsDoubleRegister() && !op->IsDoubleStackSlot());
199 untagged_operands_.Add(op, zone);
205 for (
int i = 0; i < pointer_operands_.length(); ++i) {
206 if (i != 0) stream->
Add(
";");
207 pointer_operands_[i]->PrintTo(stream);
214 switch (elements_kind) {
static LUnallocated * cast(LOperand *op)
#define DEFINE_OPERAND_CACHE(name, type)
static void TearDownCaches()
void RemovePointer(LOperand *op)
#define ASSERT(condition)
const int kPointerSizeLog2
static void SetUpCaches()
void PrintTo(StringStream *stream)
bool Equals(LOperand *other) const
static const char * AllocationIndexToString(int index)
void RecordUntagged(LOperand *op, Zone *zone)
void Add(Vector< const char > format, Vector< FmtElm > elms)
int virtual_register() const
void PrintTo(StringStream *stream)
void RecordPointer(LOperand *op, Zone *zone)
#define LITHIUM_OPERAND_TEARDOWN(name, type)
int ElementsKindToShiftSize(ElementsKind elements_kind)
int parameter_count() const
void PrintDataTo(StringStream *stream) const
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination trace on stack replacement optimize closures functions with arguments object optimize functions containing for in loops profiler considers IC stability primitive functions trigger their own optimization re try self optimization if it failed insert an interrupt check at function exit execution budget before interrupt is triggered call count before self optimization self_optimization count_based_interrupts weighted_back_edges trace_opt emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 enable use of ARMv7 instructions if enable use of MIPS FPU instructions if NULL
static const char * AllocationIndexToString(int index)
#define LITHIUM_OPERAND_LIST(V)
#define LITHIUM_OPERAND_SETUP(name, type)
void PrintTo(StringStream *stream)
int arguments_stack_height() const