28 #ifndef V8_ISOLATE_INL_H_
29 #define V8_ISOLATE_INL_H_
39 SaveContext::SaveContext(Isolate* isolate) : prev_(isolate->save_context()) {
40 if (isolate->context() !=
NULL) {
41 context_ = Handle<Context>(isolate->context());
42 #if __GNUC_VERSION__ >= 40100 && __GNUC_VERSION__ < 40300
43 dummy_ = Handle<Context>(isolate->context());
46 isolate->set_save_context(
this);
48 c_entry_fp_ = isolate->c_entry_fp(isolate->thread_local_top());
53 #ifdef ENABLE_DEBUGGER_SUPPORT
55 return debugger()->IsDebuggerActive();
63 #ifdef ENABLE_DEBUGGER_SUPPORT
64 return debug()->has_break_points();
73 #endif // V8_ISOLATE_INL_H_
Atomic32 NoBarrier_Load(volatile const Atomic32 *ptr)
bool DebuggerHasBreakPoints()
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination trace on stack replacement optimize closures functions with arguments object optimize functions containing for in loops profiler considers IC stability primitive functions trigger their own optimization re try self optimization if it failed insert an interrupt check at function exit execution budget before interrupt is triggered call count before self optimization self_optimization count_based_interrupts weighted_back_edges trace_opt emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 enable use of ARMv7 instructions if enable use of MIPS FPU instructions if NULL