41 bool SafepointEntry::HasRegisters()
const {
45 for (
int i = 0; i < num_reg_bytes; i++) {
46 if (bits_[i] != SafepointTable::kNoRegisters)
return true;
52 bool SafepointEntry::HasRegisterAt(
int reg_index)
const {
57 return (bits_[byte_index] & (1 << bit_index)) != 0;
61 SafepointTable::SafepointTable(Code*
code) {
62 ASSERT(code->kind() == Code::OPTIMIZED_FUNCTION);
64 Address header = code->instruction_start() + code->safepoint_table_offset();
67 pc_and_deoptimization_indexes_ = header + kHeaderSize;
68 entries_ = pc_and_deoptimization_indexes_ +
69 (length_ * kPcAndDeoptimizationIndexSize);
71 STATIC_ASSERT(SafepointEntry::DeoptimizationIndexField::kMax ==
72 Safepoint::kNoDeoptimizationIndex);
76 SafepointEntry SafepointTable::FindEntry(
Address pc)
const {
77 unsigned pc_offset =
static_cast<unsigned>(pc - code_->instruction_start());
78 for (
unsigned i = 0; i < length(); i++) {
80 if (GetPcOffset(i) == pc_offset)
return GetEntry(i);
82 return SafepointEntry();
86 void SafepointTable::PrintEntry(
unsigned index)
const {
88 SafepointEntry entry = GetEntry(index);
89 uint8_t* bits = entry.bits();
92 if (entry_size_ > 0) {
95 int last = entry_size_ - 1;
96 for (
int i = first; i < last; i++) PrintBits(bits[i],
kBitsPerByte);
97 int last_bits = code_->stack_slots() - ((last - first) *
kBitsPerByte);
98 PrintBits(bits[last], last_bits);
101 if (!entry.HasRegisters())
return;
103 if (entry.HasRegisterAt(j)) {
111 void SafepointTable::PrintBits(uint8_t
byte,
int digits) {
113 for (
int i = 0; i < digits; i++) {
114 PrintF(
"%c", ((byte & (1 << i)) == 0) ?
'0' :
'1');
119 void Safepoint::DefinePointerRegister(Register reg, Zone* zone) {
120 registers_->Add(reg.code(), zone);
124 Safepoint SafepointTableBuilder::DefineSafepoint(
125 Assembler* assembler,
126 Safepoint::Kind kind,
128 Safepoint::DeoptMode deopt_mode) {
130 DeoptimizationInfo info;
131 info.pc = assembler->pc_offset();
132 info.arguments = arguments;
133 info.has_doubles = (kind & Safepoint::kWithDoubles);
134 deoptimization_info_.Add(info, zone_);
135 deopt_index_list_.Add(Safepoint::kNoDeoptimizationIndex, zone_);
136 if (deopt_mode == Safepoint::kNoLazyDeopt) {
137 last_lazy_safepoint_ = deopt_index_list_.length();
139 indexes_.Add(
new(zone_) ZoneList<int>(8, zone_), zone_);
140 registers_.Add((kind & Safepoint::kWithRegisters)
141 ?
new(zone_) ZoneList<int>(4, zone_)
144 return Safepoint(indexes_.last(), registers_.last());
148 void SafepointTableBuilder::RecordLazyDeoptimizationIndex(
int index) {
149 while (last_lazy_safepoint_ < deopt_index_list_.length()) {
150 deopt_index_list_[last_lazy_safepoint_++] = index;
154 unsigned SafepointTableBuilder::GetCodeOffset()
const {
160 void SafepointTableBuilder::Emit(Assembler* assembler,
int bits_per_entry) {
165 while (assembler->pc_offset() < target_offset) {
171 assembler->RecordComment(
";;; Safepoint table.");
172 offset_ = assembler->pc_offset();
178 int bytes_per_entry =
182 int length = deoptimization_info_.length();
183 assembler->dd(length);
184 assembler->dd(bytes_per_entry);
187 for (
int i = 0; i < length; i++) {
188 assembler->dd(deoptimization_info_[i].pc);
189 assembler->dd(EncodeExceptPC(deoptimization_info_[i],
190 deopt_index_list_[i]));
194 ZoneList<uint8_t> bits(bytes_per_entry, zone_);
195 for (
int i = 0; i < length; i++) {
196 ZoneList<int>* indexes = indexes_[i];
197 ZoneList<int>* registers = registers_[i];
199 bits.AddBlock(0, bytes_per_entry, zone_);
203 if (registers == NULL) {
205 for (
int j = 0; j < num_reg_bytes; j++) {
206 bits[j] = SafepointTable::kNoRegisters;
209 for (
int j = 0; j < registers->length(); j++) {
210 int index = registers->at(j);
211 ASSERT(index >= 0 && index < kNumSafepointRegisters);
214 bits[byte_index] |= (1 << bit_index);
219 for (
int j = 0; j < indexes->length(); j++) {
220 int index = bits_per_entry - 1 - indexes->at(j);
223 bits[byte_index] |= (1
U << bit_index);
227 for (
int k = 0; k < bytes_per_entry; k++) {
228 assembler->db(bits[k]);
235 uint32_t SafepointTableBuilder::EncodeExceptPC(
const DeoptimizationInfo& info,
237 uint32_t encoding = SafepointEntry::DeoptimizationIndexField::encode(index);
238 encoding |= SafepointEntry::ArgumentsField::encode(info.arguments);
239 encoding |= SafepointEntry::SaveDoublesField::encode(info.has_doubles);
void PrintF(const char *format,...)
const int kBitsPerByteLog2
#define ASSERT(condition)
STATIC_ASSERT((FixedDoubleArray::kHeaderSize &kDoubleAlignmentMask)==0)
virtual const char * NameOfCPURegister(int reg) const
bool IsAligned(T value, U alignment)
T RoundUp(T x, intptr_t m)
const int kNumSafepointRegisters
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra emit comments in code disassembly enable use of SSE3 instructions if available enable use of CMOV instruction if available enable use of SAHF instruction if enable use of VFP3 instructions if available this implies enabling ARMv7 and VFP2 enable use of VFP2 instructions if available enable use of SDIV and UDIV instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of MIPS FPU instructions if NULL
static uint32_t & uint32_at(Address addr)
activate correct semantics for inheriting readonliness enable harmony semantics for typeof enable harmony enable harmony proxies enable all harmony harmony_scoping harmony_proxies harmony_scoping tracks arrays with only smi values automatically unbox arrays of doubles use crankshaft use hydrogen range analysis use hydrogen global value numbering use function inlining maximum number of AST nodes considered for a single inlining loop invariant code motion print statistics for hydrogen trace generated IR for specified phases trace register allocator trace range analysis trace representation types environment for every instruction put a break point before deoptimizing polymorphic inlining perform array bounds checks elimination use dead code elimination trace on stack replacement optimize closures cache optimized code for closures functions with arguments object loop weight for representation inference allow uint32 values on optimize frames if they are used only in safe operations track parallel recompilation enable all profiler experiments number of stack frames inspected by the profiler call recompile stub directly when self optimizing trigger profiler ticks based on counting instead of timing weight back edges by jump distance for interrupt triggering percentage of ICs that must have type info to allow optimization watch_ic_patching retry_self_opt interrupt_at_exit extra verbose compilation tracing generate extra code(assertions) for debugging") DEFINE_bool(code_comments